• Title/Summary/Keyword: Si Etching

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미세피치의 Probe Unit용 Slit Etching 고정 및 특성 연구

  • Kim, Jin-Hyeok;Sin, Gwang-Su;Kim, Seon-Hun;Go, Hang-Ju;Kim, Hyo-Jin;Song, Min-Jong;Han, Myeong-Su
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.177-177
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    • 2010
  • 본 연구에서는 반도체용 Si wafer에 마스크 공정 및 slit etching 공정을 적용하여 목표인 30um 이하의 Probe unit을 개발하기 위해 Deep Si Etching(DRIE) 장비를 이용하여 식각 공정에 따른 특성을 평가하였다. 마스크는 Probe block 조립에 적합한 패턴으로 설계 하였으며, slit의 에칭된 지점에 pin이 삽입될 수 있도록 그 폭을 최소한으로 설계하였다. 30um pitch와 20um pitch의 마스크를 각각 설계하여 포토공정에 의해 마스크패턴을 제작하였으며, 식각공정 결과 식각율 5um/min, profile angle $89^{\circ}{\pm}1^{\circ}$로 400um wafer의 양면관통 식각을 확인하였으며, 표면 및 단면 식각특성을 조사하였다.

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Statistical Characterization Fabricated Charge-up Damage Sensor

  • Samukawa Seiji;Hong, Sang-Jeen
    • Transactions on Electrical and Electronic Materials
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    • v.6 no.3
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    • pp.87-90
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    • 2005
  • $SiO_2$ via-hole etching with a high aspect ratio is a key process in fabricating ULSI devices; however, accumulated charge during plasma etching can cause etching stop, micro-loading effects, and charge build-up damage. To alleviate this concern, charge-up damage sensor was fabricated for the ultimate goal of real-time monitoring of accumulated charge. As an effort to reach the ultimate goal, fabricated sensor was used for electrical potential measurements of via holes between two poly-Si electrodes and roughly characterized under various plasma conditions using statistical design of experiment (DOE). The successful identification of potential difference under various plasma conditions not only supports the evidence of potential charge-up damage, but also leads the direction of future study.

Characterization of Gas Phase Etching Process of SiO2 with HF/NH3

  • Kim, Donghee;Park, Heejun;Park, Sohyeon;Lee, Siwon;Kim, Yejin;Hong, Sang Jeen
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.2
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    • pp.45-50
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    • 2022
  • The etching with high selectivity of silicon dioxide over silicon nitride is essential in semiconductor fabrication, and gas phase etch (GPE) can increase the competitiveness of the selective dielectric etch. In this work, GPE of plasma enhanced chemical vapor deposited SiO2 was performed, and the effects of process parameters, such as temperature, partial pressure ratio, and gas supply cycle, are investigated in terms of etch rate and within wafer uniformity. Employing multiple regression analysis, the importance of each parameter elements is analyzed.