• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.10
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• pp.687-692
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• 1999

A new technique to measure low level capacitance variations of the gyroscope is proposed and verified by computer simulation. It is based on the new CV(capacitance-voltage) converter circuit biased by dc current source and the peak detector without low pass filter. The CV converter biased by dc current source provides good signal-to-noise ratio and this setup of the detection circuitry without low pass filter makes it possible to provide short settling time, that is, higher speed of measurement and wide operation range if only a few parameters are adjusted. The key parameters that affect the performance of the detection circuitry are illustrated and computer simulation results are presented. The demonstrated detection circuitry shows linear response from 10 fF to 130 fF at 10 kHz and shows good linearity.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.25 no.6
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• pp.406-413
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• 2015

The piezoelectric coupling in piezoelectric vibration energy harvesters with load resistance induces electrical damping as well as increase in the system stiffness. Starting from analytically deriving the explicit relations through governing equations in the frequency domain, this work identifies the characteristics of the electrically induced damping mechanism and shows that the electrically induced damping serves as a structural hysteretic damping on condition that a piezoelectric vibration energy harvester is excited at its short-circuit resonant frequency and its load resistor is optimally impedance- matched at the same time. Finally, it is analytically verified that the equivalence of a mechanical and an electrically induced damping ratio is required for the maximum power generation at a load resistor, which was claimed in some literature.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.75-80
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• 1994

AlAs/GaAs/AlAs RTDs(Resonant Tunneling Diodes) are fabricated and current-voltage properties of them are measured. At room temperature, peak to valley ratio is 2.4 NOT.AND.OR logic gates and Flip-Flop are fabricated using the bistable characteristics of RTDs. Although NOT.AND.OR logic gates need 5~8 transistors. only one RTD is sufficient to fabricate the logic gates. Since the switching time is very short(<10$^12$sec), it is possible to drive the semiconductor circuits fast and integrate them very large. And it is convinced the possibility of integrating RTDs to multilevel logic circuits by observing two peaks of similar current in the serial connection of two RTDs.

• The Journal of Engineering Geology
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• v.25 no.4
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• pp.499-510
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• 2015

Artificial accelerated weathering test evaluated rocks from near the circuit road of Ulleungdo island, approximately 120 km from east of the Korean Peninsula. The tests subjected rock specimens to conditions based on the climate of the island. The specimens (such as basaltic breccia, trachyte, volcanic breccia) were preliminarily classified using a TAS diagram (XRF data) and based on the constituent minerals (XRD data); they were further classified by weathering degree according to their absorption ratios. During the artificial accelerated weathering, the absorption ratio of most of the specimens increased, but the point-load strength did not decrease in most cases, except for the volcanic breccia. The greater initial absorption ratio of trachyte rock specimen in comparison with the other specimens led to a greater increase of its absorption ratio during the artificial accelerated weathering test. The volcanic breccia specimens showed the greatest increase of absorption ratio and the biggest reduction ratio of the point- load strength during the tests. These results could aid prediction of the weathering rate of rocks in Ulleungdo island subjected to weathering processes; trachyte which appears to accelerate with time, and volcanic breccia whose mechanical strength can largely decrease in a relative short period of time. Proper measures therefore appear necessary for the prevention of natural disaster such as rock fall and landslide around the circuit road.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.10
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• pp.46-51
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• 2007

The fault current limiting characteristics of superconducting fault current limiter(SFCL) using magnetic coupling of two coils were investigated. This SFCL consists of a high-TC superconducting(HTSC) element and two coils with series or parallel connection on the same iron. In normal time, the inner magnetic fluxes generated by two coils are canceled in case that the HTSC element keeps superconducting state. However, in case that the resistance of the HTSC element happens by a short-circuit the magnetic fluxes, not cancelled, induce the voltages across two coils and the fault current can be limited by the impedance of this SFCL. This SFCL has the merit that the operational current of SFCL can be increased higher than the critical current of the superconducting element by adjusting the inductance ratio between two coils. To confirm its operation, the circuit for the fault simulation was constructed. From the measured voltage and current of the SFCL, it was confirmed that the operating current of this SFCL increased more than that of HTSC element's independent operation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6A
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• pp.820-831
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• 1999

In this paper, we have compared the performance of a D-TDMA protocol with that of a CDMA protocol, in radio access system for integrated voice/data services.The D-TDMA protocol is based on a generic dynamic channel assignment approach to be followed a combination of “circuit mode” reservation for voice calls, along with dynamic first-come-first served assignment of remaining capacity for data messages. In the CDMA protocol, we have used the voice activity detection to reduce the interface power of other mobiles in internal and external cells, and analyzed the interference power ratio. Also we have computed BER(Bit Error Rate) by using this interference power ratio and evaluated voice blocking probability(voice packet loss probability) and data transmission delay, according to average data length and average data arrival rate.We have found the CDMA protocol achieves comparatively higher performance for short data length, regardless of data arrival rate. Otherwise, the data transmission delay of D-TDMA protocol is shorter than that of the CDMA protocol for long data message.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.2
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• pp.63-67
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• 2010

The organic solar cells with Glass/ITO/PEDOT:PSS/P3HT:PCBM/Al structure were fabricated using regioregular poly (3-hexylthiophene) (P3HT) polymer:(6,6)- phenyl $C_{61}$-butyric acid methyl ester (PCBM) fullerene polymer as the bulk hetero-junction layer. The P3HT and PCBM as the electron donor and acceptor materials were spin casted on the indium tin oxide (ITO) coated glass substrates. The optimum mixing concentration ratio of photovoltaic layer was found to be P3HT:PCBM = 4:4 in wt%, indicating that the short circuit current density ($J_{SC}$), open circuit voltage ($V_{OC}$), fill factor (FF) and power conversion efficiency (PCE) values were about 4.7 $mA/cm^2$, 0.48 V, 43.1% and 0.97%, respectively. To investigate the effects of the post annealing treatment, as prepared organic solar cells were post annealed at the treatment time range from 5min to 20min at $150^{\circ}C$. $J_{SC}$ and $V_{OC}$ increased with increasing the post annealing time from 5min to 15min, which may be originated from the improvement of the light absorption coefficient of P3HT and improved ohmic contact between photo voltaic layer and Al electrode. The maximum $J_{SC},\;V_{OC}$, FF and PCE values of organic solar cell, which was post annealed for 15min at $150^{\circ}C$, were found to be about 7.8 $mA/cm^2$, 0.55 V, 47% and 2.0%, respectively.