• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.12-16
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• 2009

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5{\times}10^{14}cm^{-3}$, size of $600{\um}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50{\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

• Science of Emotion and Sensibility
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• v.25 no.2
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• pp.87-100
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• 2022

People who spend more time alone tend to report higher levels of loneliness. However, whether people experience loneliness in solitude can differ The current research investigated the role of a sense of power as a predictor of loneliness among people who lack social interaction. investigated factors predicting loneliness in people with little social time large-scale survey data. As a result of discriminant analysis, a sense of power was verified as a factor that lonely non-lonely groups. a sense of power As a result, a causal relationship between a sense of power and social loneliness was confirmed. When people feel alone, a high sense of power can work as a buffer against loss of belongingness and the experience of social loneliness. This research focused on psychological rather than situational factors to alleviate loneliness in the current situation where social encounters are limited due to the increase of single-person households and the 19 pandemic.

• Journal of Electrical Engineering and information Science
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• v.3 no.3
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• pp.300-305
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• 1998

This paper describes new sense amplifier with fast sensing delay time of 0.54ns and 32kb CMOS embedded SRAM with 4.67 ns access time for a 3-V power supply. It was achieved using the sense amplifier with multiple point sensing scheme and highs peed bit-line scheme. The sense amplifier saves 25% of the power dissipation compared with the conventional one while maintaining a very short sensing delay. The SRAM uses 0.5m double-polysilicon and triple-metal CMOS process technology. A die size is 1.78${\times}$mm2.13mm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.2
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• pp.39-46
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• 2012

The newly designed sense amplifier in this paper has rail-to-rail input range achieving low power consumption. Reducing static power consumption generated due to DC path to ground is key element for low power consumption in this paper. The proposed sense amplifier performs power-saving operation using negative feedback circuit that controls the current flow with the newly added PMOS input terminal. As a simulation result, the proposed sense amplifier consumed about over 50 % efficiency of the average power consumed by the typical Rail-to-Rail sense amplifier.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.821-827
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• 2001

A new low power charge-recycling ROM architecture is proposed. The charge-recycling ROM uses charge-recycling method in bit lines of ROM to save the power consumption. About 90% of the total power used in the ROM is consumed in bit lines. With the proposed method, power consumption in ROM bit lines can be reduced asymptotically to zero if the number of bit lines is infinite and the sense amplifiers detect infinitely small voltage difference. However, the real sense amplifiers cannot sense very small voltage difference. Therefore, reduction of power consumption is limited. The simulation results show that the charge-recycling ROM only consumes 13% ~ 78% of the conventional low power contact programming mask ROM.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.469-472
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• 2004

In this paper a current mode sense amplifier suitable for 30nm SONOS flash memories read operation is presented. The proposed sense amplifier employs cross coupled latch type circuit and current mirror to amplify signal from selected memory cell. This sense amplifier provides fast response in low voltage and low current dissipation. Simulation results show the sensing delay time and current dissipation for power supply voltages Vdd to expose limitations of the sense amplifier in various operating conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.6-7
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• 2008

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450V power MOSFET devices by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}cm^{-3}$, size of $600{\mu}m^2$ with 4.5 $\Omega$, and off-state leakage current below 50 ${\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods is meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.483-484
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• 2013

본 논문에서는 플라이백 컨버터 전력조절기의 스위치전류 센싱을 통한 최대전력 추종 제어 구현을 제안한다. 여분의 전류 센서를 사용하지 않고 연속도통모드(CCM)에서 PV전류를 추정 하기 위하여 전류 센싱이 가능한 SenseFET 스위치를 사용한다. 최대전력추종제어를 하기 위해 태양광 패널의 전류 정보가 필요하며 이 값은 플라이백 전력조절기에서 스위치 전류의 평균값과 같다. 따라서 본 논문에서는, SenseFET을 이용한 전류 측정방법을 이용하여 하드웨어를 구현하고 제안한 방식을 검증하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.12
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• pp.4617-4632
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• 2021

IEEE 802.11ax is a protocol being developed for high-density Wireless Local Area Networks (WLAN). Several algorithms have been proposed to improve the level of spatial reuse applied in IEEE 802.11ax. However, these algorithms are tentative and do not specify how to select the transmit power and carrier sense threshold in practice; It is unclear when and why the tuned parameters lead to better network performance. In this paper, we restricted the scale of transmit power tuning to prevent the case of backfire in which spatial reuse will result in transmission failure. If the restrictions cannot be satisfied, spatial reuse will be abandoned. This is why we named the proposed scheme as Arbitration based Spatial Reuse (ASR). We quantified the network performance after spatial reuse, and formulate a corresponding maximum problem whose solution is the optimal carrier sense threshold and transmit power. We verified our theoretical analysis by simulation and compared it with previous studies, and the results show that ASR improves the throughput up to 8.6% compared with 802.11ax. ASR can avoid failure of spatial reuse, while the spatial reuse failure rate of existing schemes can up to 36%. To use the ASR scheme in practice, we investigate the relation between the optimal carrier sense threshold and transmit power. Based on the relations got from ASR, the proposed Relation based Spatial Reuse (RSR) scheme can get a satisfactory performance by using only the interference perceived and the previously found relations.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.115-115
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• 2009

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The Power MOSFET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 40 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}\;cm^{-3}$, size of $600\;{\mu}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50\;{\mu}A$. We offer the layout of the proposed Power MOSFET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.