Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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A Design Method on Power Sense FET to Protect High Voltage Power Device

고전압 전력소자를 보호하기 위한 Sense FET 설계방법

  • 경신수 (고려대학교 전기공학과) ;
  • 서준호 (고려대학교 전기공학과) ;
  • 김요한 (고려대학교 전기공학과) ;
  • 이종석 (고려대학교 전기공학과) ;
  • 강이구 (극동대학교 정보통신표준화학부) ;
  • 성만영 (고려대학교 전기공학과)
  • Published : 2009.01.01
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Abstract

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5{\times}10^{14}cm^{-3}$, size of $600{\um}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50{\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

Keywords

References

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