• Journal of the Semiconductor & Display Technology
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• v.12 no.2
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• pp.39-43
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• 2013

The semiconductor equipments generate necessary data through communication networks for the effective manufacturing processes and automation of semiconductor equipments. For transferring data between semiconductor equipments and sending data to monitor equipments, several standards for communication protocols have been proposed. Communication networks in semiconductor manufacturing systems will transmit a lot of data traffic, which can be vulnerable in data delay and network failure. Therefore, it is required that data traffic need to be distributed. To accomplish this objective, we recommend the use of a redundant and valuable communication path which is constructed by a wireless sensor network. In this paper, the directed diffusion method for wireless sensor networking is suggested for networking semiconductor equipments. It is shown that how the directed diffusion is employed to connect semiconductor equipments. Also, we show how to implement the SECS of semiconductor equipments communication protocols based on the directed diffusion.

• Journal of Korean Institute of Industrial Engineers
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• v.36 no.3
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• pp.154-163
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• 2010

Process monitoring of output variables affecting final performance have been mainly executed in semiconductor manufacturing process. However, even earlier detection of causes of output variation cannot completely prevent yield loss because a number of wafers after detecting them must be re-processed or cast away. Semiconductor manufacturers have put more attention toward monitoring process inputs to prevent yield loss by early detecting change-point of the process. In the paper, we propose the method to efficiently monitor functional input variables in multi-phase semiconductor manufacturing process. Measured input variables in the multi-phase process tend to be of functional structured form. After data pre-processing for these functional input data, change-point analysis is practiced to the pre-processed data set. If process variation occurs, key variables affecting process variation are selected using contribution plot for monitoring efficiency. To evaluate the propriety of proposed monitoring method, we used real data set in semiconductor manufacturing process. The experiment shows that the proposed method has better performance than previous output monitoring method in terms of fault detection and process monitoring.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.108-112
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• 2023

Precision manufacturing technology is rapidly developing due to the extreme miniaturization of semiconductor processes to comply with Moore's Law. Accurate and precise alignment, which is one of the key elements of the semiconductor pre-process and post-process, is very important in the semiconductor process. The center detection of wafer align marks plays a key role in improving yield by reducing defects and research on accurate detection methods for this is necessary. Methods for accurate alignment using traditional image sensors can cause problems due to changes in image brightness and noise. To solve this problem, engineers must go directly into the line and perform maintenance work. This paper emphasizes that the development of AI technology can provide innovative solutions in the semiconductor process as high-resolution image and image processing technology also develops. This study proposes a new wafer center detection method through variable thresholding. And this study introduces a method for detecting the center that is less sensitive to the brightness of LEDs by utilizing a high-performance object detection model such as YOLOv8 without relying on existing algorithms. Through this, we aim to enable precise wafer focus detection using artificial intelligence.

• Journal of Institute of Control, Robotics and Systems
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• v.5 no.6
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• pp.724-733
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• 1999

An effective method of system modeling and dynamic scheduling for the back-end line of semiconductor manufacturing is proposed. The virtual factory, describing semiconductor manufacturing line, is designed in detail, and then a Petri net model simulator is developed for operation and control of the modular cells of the virtual factory. The petri net model is a colored timed Petri nets (CTPNs). The simulator will be utilized to analyze and evaluate various dynamic status and operatons of manufacturing environments. The dynamic schedulaer has a hierarchical structure with the higher for planning level and the lower for dynamic scheduling level. The genetic algorithm is applied to extract optimal conditions of the scheduling algorithm. The proposed dynamic scheduling is able to realize the semiconductor manufacturing environments for the diversity of products, the variety of orders by many customers, the flexibility of order change by changing market conditions, the complexity of manufacturing processes, and the uncertainty of manufacturing resources. The proposed method of dynamic scheduling is more effective and useful in dealing with such recent pressing requirements including on-time delivery, quick response, and flexibility.

• Journal of Korean Institute of Industrial Engineers
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• v.41 no.6
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• pp.579-587
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• 2015

Semiconductor manufacturing industry is a high density integration industry because it generates a vest number of data that takes about 300~400 processes that is supervised by numerous production parameters. It is asked of engineers to understand the correlation between different stages of the manufacturing process which is crucial in reducing production costs. With complex manufacturing processes, and defect processing time being the main cause. In the past, it was possible to grasp the corelation among manufacturing process stages through the engineer's domain knowledge. However, It is impossible to understand the corelation among manufacturing processes nowadays due to high density integration in current semiconductor manufacturing. in this paper we propose a canonical correlation analysis (CCA) using both wafer test voltage variables and fail bit counts variables. using the method we suggested, we can increase the semiconductor yield which is the result of the package test.

• IE interfaces
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• v.13 no.3
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• pp.348-357
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• 2000

SCM(Supply Chain Management) is a new approach to satisfy customers via an integrated management for the whole business processes of the manufacturing from the raw material procurement to the product or service delivery to customers. Typically the semiconductor industry is the one whose supply chain network is distributed all over the world, and its manufacturing process has the particular characteristics which has to be considered in the modeling of supply chain. In this paper we suggest the push and pull type supply chain models based on the manufacturing characteristics and their mathematical formulation for the semiconductor industry. Push supply chain model pursuits the high throughput and the balance of the WIP flow, and pull supply chain model does to minimize the total cost of order-based manufacturing, distribution and transportation process in order to meet customer's request appropriately.

• Analytical Science and Technology
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• v.5 no.4
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• pp.455-464
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• 1992

Using FT-IR, we determined the depth of silylated layers produced from various gas-phase-silylation conditions was proposed by using Fourier Transform Infrared (FT-IR) spectroscopic analysis. The depth of silylated layer was determined from absorbance measurments of the significant peaks (Si-O-ph, Si-C, Si-H) of FT-IR spectra with background spectrum subtraction method. And the results were compared with thickness measurments of SEM. The results were well agree with SEM. It found to be well suited for determining silylation process window.

• Analytical Science and Technology
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• v.5 no.4
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• pp.359-366
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• 1992

Using micro-Raman spectrometer, we investigated the evaluation of microstress on silicon surface after the local thermal oxidation. The induced stress of silicon surface after local thermal oxidation shows maximum value at the interface of silicon oxide and active area. The smaller the size of active area, the larger stress. From the evaluation of three other device isolation processes, A, B and moB, whose active size has $0.45{\mu}m$ in length, moB process is turned out to have the lowest stress value and the smallest bird's beak effect.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.124-128
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• 2023

Semiconductor engineers have long sought to enhance the energy efficiency of mobile semiconductors by reducing their voltage. During the final stages of the semiconductor manufacturing process, the screening and evaluation of voltage is crucial. However, determining the optimal test start voltage presents a significant challenge as it can increase testing time. In the semiconductor manufacturing process, a wealth of test element group information is collected. If this information can be controlled to predict the test voltage, it could lead to a reduction in testing time and increase the probability of identifying the optimal voltage. To achieve this, this paper is exploring machine learning techniques, such as linear regression and ensemble models, that can leverage large amounts of information for voltage prediction. The outcomes of these machine learning methods not only demonstrate high consistency but can also be used for feature engineering to enhance accuracy in future processes.

• Journal of the Korea Society for Simulation
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• v.18 no.4
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• pp.219-225
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• 2009

The primary purpose of this study is to build computer models referring overall flow of complex and various semiconductor wafer manufacturing process and to implement a educational model which operates with a presentation tool showing device design. It is important that Korean semiconductor industries secure high competitive power on efficient manufacturing management and to develop technology continuously. Models representing the FAB processes and the functions of each process are developed for Seoul National University Semiconductor Research Center. However, it is expected that the models are effective as visually educational tools in Korean semiconductor industries. In addition, it is anticipated that these models are useful for semiconductor process courses in academia. Scalability and flexibility allow semiconductor manufacturers to customize the models and perform simulation education. Subsequently, manufacturers save budget.