Operating Voltage Prediction in Mobile Semiconductor Manufacturing Process Using Machine Learning

기계학습을 활용한 모바일 반도체 제조 공정에서 동작 전압 예측

  • Inhwan Baek (Department of Semiconductor and Display Engineering, Sungkyunkwan University) ;
  • Seungwoo Jang (Department of Artificial Intelligence, Sungkyunkwan University) ;
  • Kwangsu Kim (College of Computing and Informatics, Sungkyunkwan University)
  • 백인환 (성균관대학교 반도체디스플레이공학과) ;
  • 장승우 (성균관대학교 인공지능학과) ;
  • 김광수 (성균관대학교 소프트웨어융합대학)
  • Received : 2023.03.16
  • Accepted : 2023.03.22
  • Published : 2023.03.31

Abstract

Semiconductor engineers have long sought to enhance the energy efficiency of mobile semiconductors by reducing their voltage. During the final stages of the semiconductor manufacturing process, the screening and evaluation of voltage is crucial. However, determining the optimal test start voltage presents a significant challenge as it can increase testing time. In the semiconductor manufacturing process, a wealth of test element group information is collected. If this information can be controlled to predict the test voltage, it could lead to a reduction in testing time and increase the probability of identifying the optimal voltage. To achieve this, this paper is exploring machine learning techniques, such as linear regression and ensemble models, that can leverage large amounts of information for voltage prediction. The outcomes of these machine learning methods not only demonstrate high consistency but can also be used for feature engineering to enhance accuracy in future processes.

반도체 양산을 진행하며 얻어지는 여러 공정 데이터들로 사용 전압을 예측하여 에너지 효율적인 제품을 위한 목적으로 연구를 시작했다. 각각의 feature들 단독으로 전압을 예측하기 어려웠던 문제를 머신 러닝을 통해, 특히 Ensemble model을 이용함으로써 단일 모델보다 정확한 예측을 할 수 있었다. 더욱 중요한 시사점으로는 feature importance 분석을 통해 모델 예측에 영향이 큰 feature와 작은 feature에 대한 분석이다. 영향도가 높은 feature를 통해 비슷한 계열의 측정값을 늘리고, 낮은 feature 들의 문제점을 개선함으로써 차세대 제품에서 더욱 정확도 높은 모델을 위한 발판을 마련할 수 있었다.

Keywords

References

  1. M. Yamamoto, H. Endo and H. Masuda, "Development of a large-scale TEG for evaluation and analysis of yield and variation," in IEEE Transactions on Semiconductor Manufacturing, vol. 17, no. 2, pp. 111-122, May 200 https://doi.org/10.1109/TSM.2004.826937
  2. A. Bassi, A. Vegetti, L. Croce and A. Boglioio, "Measuring the effects of process variations on circuit performance by means of digitally-controllable ring oscillators", Proc ICMTS, pp. 214-217, 2003.
  3. Y. Shimizu, M. Nakamura, T. Matsuoka and K. Taniguchi, "Test Structure for Precise Statistical Characteristics Measurement of MOSFETs", Proc. ICMTS, pp. 49-54, 2002.
  4. Pierret and Robert F, "Semiconductor Device Fundamentals" in PEARSON, 2012
  5. K. Roy, S. Mukhopadhyay and H. Mahmoodi-Meimand, "Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits," in Proceedings of the IEEE, vol. 91, no. 2, pp. 305-327, Feb. 2003, doi: 10.1109/JPROC.2002.808156.
  6. V. De and S. Borkar, "Technology and design challenges for low power and high performance," in Proc. Int. Symp. Low Power Electronics and Design, 1999, pp. 163-168.
  7. S. Thompson, P. Packan, and M. Bohr, "Linear versus saturated drive current: Tradeoffs in super steep retrograde well engineering," in Dig. Tech. Papers Symp. VLSI Technology, 1996, pp. 154-155.
  8. S. Venkatesan, J. W. Lutze, C. Lage, and W. J. Taylor, "Device drive current degradation observed with retrograde channel profiles," in Proc. Int. Electron Devices Meeting, 1995, pp. 419-422.
  9. J. Jacobs and D. Antoniadis, "Channel profile engineering for MOSFET's with 100 nm channel lengths," IEEE Trans. Electron Devices, vol. 42, pp. 870-875, May 1995. https://doi.org/10.1109/16.381982
  10. S. Shigematsu, S. Mutoh, Y. Matsuya, Y. Tanabe, and J. Yamada, "A 1-V high speed MTCMOS circuit scheme for power-down applications," IEEE J. Solid-State Circuits, vol. 32, pp. 861-869, June 1997. https://doi.org/10.1109/4.585288
  11. Prinzie J, De Smedt V, "Single Event Transients in CMOS Ring Oscillators". Electronics 2019, 8, 618.
  12. Jason Flinn, M. Satyanarayanan. "Energy-aware adaptation for mobile applications" ACM symposium on Operating systems principles (SOSP '99). SIGOPS Oper. Syst. Rev. 33, 5 (Dec. 1999), 48-63.
  13. Bauer, E., Kohavi, R. "An Empirical Comparison of Voting Classification Algorithms: Bagging, Boosting, and Variants." Machine Learning 36, 105-139 (1999). https://doi.org/10.1023/A:1007515423169
  14. Geurts, P., Ernst, D. & Wehenkel, L. "Extremely randomized trees." Machine Learning 63, 3-42 (2006). https://doi.org/10.1007/s10994-006-6226-1
  15. Ali, K.M., Pazzani, M.J. "Error Reduction through Learning Multiple Descriptions." Machine Learning 24, 173-202 (1994). https://doi.org/10.1007/BF00058611
  16. Song-Yeon Lee and Yong Jeong Huh, "A Study on Prediction Model of Scaffold Appearance Defect Using Machine Learning", Journal of the Semiconductor & Display Technology, Vol.19, no.2, pp. 26-30, 2020.