• Title/Summary/Keyword: Semiconductor etching process

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Feature Based Decision Tree Model for Fault Detection and Classification of Semiconductor Process (반도체 공정의 이상 탐지와 분류를 위한 특징 기반 의사결정 트리)

  • Son, Ji-Hun;Ko, Jong-Myoung;Kim, Chang-Ouk
    • IE interfaces
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    • v.22 no.2
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    • pp.126-134
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    • 2009
  • As product quality and yield are essential factors in semiconductor manufacturing, monitoring the main manufacturing steps is a critical task. For the purpose, FDC(Fault detection and classification) is used for diagnosing fault states in the processes by monitoring data stream collected by equipment sensors. This paper proposes an FDC model based on decision tree which provides if-then classification rules for causal analysis of the processing results. Unlike previous decision tree approaches, we reflect the structural aspect of the data stream to FDC. For this, we segment the data stream into multiple subregions, define structural features for each subregion, and select the features which have high relevance to results of the process and low redundancy to other features. As the result, we can construct simple, but highly accurate FDC model. Experiments using the data stream collected from etching process show that the proposed method is able to classify normal/abnormal states with high accuracy.

Study for an BF3 Specialty Gas Production (BF3 생산에 관한 연구)

  • Lee, Taeck-Hong;Kim, Jae-Young
    • Journal of the Korean Institute of Gas
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    • v.15 no.3
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    • pp.74-78
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    • 2011
  • $BF_3$ gas has been used for semiconductor manufacturing process and applied in plasma etching, chemical vapor deposition, chamber cleaning processes etc,. $BF_3$ provides Boron and acts as a p-type doping in electrode in semiconductor. In this study, we investigate thermaldecomposition of alkali-boron complexes and suggest a simple way to produce $BF_3$ from $NaBF_4$ and $KBF_4$.

Fabrication of Nano-photonic Crystals with Lattice Constant of 460-nm by Inductively-coupled Plasma Etching Process (유도결합형 플라즈마 식각공정을 통해 제작된 460 nm 격자를 갖는 나노 광결정 특성)

  • Choi, Jae-Ho;Kim, Keun-Joo
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.2 s.15
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    • pp.1-5
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    • 2006
  • The GaN thin film on the 8 periods InGaN/GaN multi-quantum well structure was grown on the sapphire substrate using metal-organic chemical vapor deposition. The nano-scaled triangular-lattice holes with the diameter of 150 nm were patterned on a polymethylmethacrylate blocking film using an electron beam nano-lithography system. The thin slab and two-dimensional photonic crystals with the thickness of 28 nm were fabricated on the GaN layer for the blue light diffraction sources. The photonic crystal with the lattice parameter of 460 nm enhances spectral intensity of photoluminescence indicating that the photonic crystals provides the source of nano-diffraction for the blue light of the 450-nm wavelength.

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Catalytic Decomposition of SF6 from Semiconductor Manufacturing Process (촉매를 이용한 반도체 공정 SF6 처리에 관한 연구)

  • Hwang, Cheol-Won;Choi, Kum-Chan
    • Journal of Environmental Science International
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    • v.22 no.8
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    • pp.1019-1027
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    • 2013
  • Sulfur hexa-fluoride has been used as a etching gas in semiconductor industry. From the globally environmental issues, it is urgent to control the emissions of this significant greenhouse gas. The main objective of this experimental investigation was to find the effective catalyst for $SF_6$ decomposition. The precursor catalyst of hexa-aluminate was prepared to investigate the catalytic activity and stability. The precursor catalyst of hexa-aluminate was modified with Ni to enhance the catalytic activities and stability. The catalytic activity for $SF_6$ decomposition increased by the addition of Ni and maximized at 6wt% addition of Ni. The addition of 6wt% Ni in precursor catalyst of hexa-aluminate improved the resistant to the HF and reduced the crystallization and phase transition of catalyst.

A Study on Electrostatic Chuck Cooling by Ceramic Dielectric Material and Coolant path (세라믹 유전체 물질과 냉매 유로 형상에 따른 정전척 냉각에 관한 연구)

  • Kim, Daehyeon;Kim, Kwangsun
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.3
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    • pp.85-89
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    • 2018
  • Temperature uniformity of a wafer in a semiconductor process is a very important factor that determines the overall yield. Therefore, it is very important to confirm the temperature characteristics of the chuck surface on which the wafer is lifted. The temperature characteristics of the chuck depend on the external heat source, the shape of the cooling channel inside the chuck, the material on the chuck surface, and so on. In this study, CFD confirms the change of temperature characteristics according to the stacking order of ceramic materials and inner coolant path on the chuck surface. Finally this study suggests the best cooling condition of electrostatic chuck.

Vibration Analysis of Spin Etcher (Spin Etcher의 진동 분석)

  • 임경화;이은경;조중근
    • Journal of the Semiconductor & Display Technology
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    • v.2 no.1
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    • pp.15-19
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    • 2003
  • Spin etcher can process frontside and backside on the wafer, which is used for etching, stripping, cleaning and wafer reclamation. A new generation of spin etchers has been designed to meet 300mm wafer processing. The larger header and higher spin speed make vibration problem a severe problem in developing equipments. This study shows schematic process of solving practical vibration problems, where it is required to analyze the principal ca uses of vibration problem and find out the method of vibration reduction in spin etcher. The vibration under normal operation is measured in time domain and is analyzed in frequency domain. And modal parameters are obtained through modal test. Using the modal parameters from experiments, the model of finite element method is formulated. From diagnosis using many measurements and analyses, it can be shown that main cause of vibration is unbalance of head.

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Development of Plastic Film Type Water Level Sensor for High Temperature (고온용 플라스틱 필름 수위 센서 개발)

  • Lee, Young Tae
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.4
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    • pp.124-128
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    • 2019
  • In this paper, a high temperature plastic film type water level sensor was developed. The high temperature film type water level sensor was manufactured by attaching a copper film to a polyimide film which can be used for a long time at 250℃, by laminating process and patterning the electrode by etching process. For the performance evaluation of the developed film type water level sensor, the temperature dependence of the capacitance was measured, and the deformation was examined after standing for 8 hours in 150℃ air. The developed film type water level sensor can be used at up to 150℃, and can be applied to electric ports and steam devices.

Optimization for robot operations in cluster tools for concurrent manufacturing of multiple wafer types (복수 타입의 웨이퍼 혼류생산을 위한 클러스터 장비 로봇 운영 최적화)

  • Tae-Sun Yu;Jun-Ho Lee;Sung-Gil Ko
    • Journal of Industrial Technology
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    • v.43 no.1
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    • pp.49-55
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    • 2023
  • Cluster tools are extensively employed in various wafer fabrication processes within the semiconductor manufacturing industry, including photo lithography, etching, and chemical vapor deposition. Contemporary fabrication facilities encounter customer orders with technical specifications that are similar yet slightly varied. Consequently, modern fabrications concurrently manufacture two or three different wafer types using a cluster tool to maximize chamber utilization and streamline the flow of wafer lots between different process stages. In this review, we introduce two methods of concurrent processing of multiple wafer types: 1) concurrent processing of multiple wafer types with different job flows, 2) concurrent processing of multiple wafer types with identical job flows. We describe relevant research trends and achievements and discuss future research directions.

40nm InGaAs HEMT's with 65% Strained Channel Fabricated with Damage-Free $SiO_2/SiN_x$ Side-wall Gate Process

  • Kim, Dae-Hyun;Kim, Suk-Jin;Kim, Young-Ho;Kim, Sung-Wong;Seo, Kwang-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.27-32
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    • 2003
  • Highly reproducible side-wall process for the fabrication of the fine gate length as small as 40nm was developed. This process was utilized to fabricate 40nm InGaAs HEMTs with the 65% strained channel. With the usage of the dual $SiO_2$ and $SiN_x$ dielectric layers and the proper selection of the etching gas, the final gate length (Lg) was insensitive to the process conditions such as the dielectric over-etching time. From the microwave measurement up to 40GHz, extrapolated fT and fmax as high as 371 and 345 GHz were obtained, respectively. We believe that the developed side-wall process would be directly applicable to finer gate fabrication, if the initial line length is lessened below the l00nm range.

Dielectric Layer Planarization Process for Silicon Trench Structure (실리콘 트랜치 구조 형성용 유전체 평탄화 공정)

  • Cho, Il Hwan;Seo, Dongsun
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.41-44
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    • 2015
  • Silicon trench process for bulk fin field effect transistor (finFET) is suggested without using chemical mechanical polishing (CMP) that cause contamination problems with chemical stuff. This process uses thickness difference of photo resistor spin coating and silicon nitride sacrificial layer. Planarization of silicon oxide and silicon trench formation can be performed with etching processes. In this work 50 nm silicon trench is fabricated with AZ 1512 photo resistor and process results are introduced.