• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.382-382
• /
• 2012

Nanostructures have a larger surface/volume ratio as well as unique mechanical, physical, chemical properties compared to existing bulk materials. Materials for biomedical implants require a good biocompatibility to provide a rapid recovery following surgical procedure and a stabilization of the region where the implants have been inserted. The biocompatibility is evaluated by the degree of the interaction between the implant materials and the cells around the implants. Recent researches on this topic focus on utilizing the characteristics of the nanostructures to improve the biocompatibility. Several studies suggest that the degree of the interaction is varied by the relative size of the nanostructures and cells, and the morphology of the surface of the implant [1, 2]. In this paper, we fabricate the nanowires on the Ti substrate for better biocompatible implants and other biomedical applications such as artificial internal organ, tissue engineered biomaterials, or implantable nano-medical devices. Nanowires are fabricated with two methods: first, nanowire arrays are patterned on the surface using e-beam lithography. Then, the nanowires are further defined with deep reactive ion etching (RIE). The other method is self-assembly based on vapor-liquid-solid (VLS) mechanism using Sn as metal-catalyst. Sn nanoparticle solutions are used in various concentrations to fabricate the nanowires with different pitches. Fabricated nanowries are characterized using scanning electron microscopy (SEM), x-ray diffraction (XRD), and high resolution transmission electron microscopy (TEM). Tthe biocompatibility of the nanowires will further be investigated.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.4
• /
• pp.454-461
• /
• 2015

Light enhancement of GaN based light emitting diodes (LEDs) have been investigated by texturing the top p-GaN surface. Nano-textured LEDs have been fabricated using self-assembled Ni nano mask during dry etching process. Experimental results were further compared with simulation data. Three types of LEDs were fabricated: Conventional (planar LED), Surface nano-porous (porous LED) and Surface nano-cluster (cluster LED). Compared to planar LED there were about 100% and 54% enhancement of light output power for porous and cluster LED respectively at an injection current of 20 mA. Moreover, simulation result showed consistency with experimental result. The increased probability of light scattering at the nano-textured GaN-air interface is the major reason for increasing the light extraction efficiency.

• Proceedings of the Korea Association of Crystal Growth Conference
• /
• 1999.06a
• /
• pp.115-127
• /
• 1999

The charged clusters or particles, which contain hundreds to thousands of atoms or even more, are suggested to form in the gas phase in the thin film processes such as CVD, thermal evaporation, laser ablation, and flame deposition. All of these processes are also used in the gas phase synthesis of the nanoparticles. Ion-induced or photo-induced nucleation is the main mechanism for the formation of these nanoclusters or nanoparticles inthe gas phase. Charged clusters can make a dense film because of its self-organizing characteristics while neutral ones make a porous skeletal structure because of its Brownian coagulation. The charged cluster model can successfully explain the unusual phenomenon of simultaneous deposition and etching taking place in diamond and silicon CVD processes. It also provides a new interpretation on the selective deposition on a conducting material in the CVDd process. The epitaxial sticking of the charged clusters on the growing surface is gettign difficult as the cluster size increases, resulting in the nanostructure such as cauliflowr or granular structures.

• Proceedings of the KIEE Conference
• /
• 2001.07c
• /
• pp.1893-1895
• /
• 2001

In this paper, novel release technique using wet etch is proposed. The results of this technique and the results of SAMs (Self-Assembled monolayers) coated after release using this technique are compared. Fabricated structure have 100 um in width and experimental length is from 100 um to 1 mm. Thickness of aluminum sacrificial layer is 2 um and structure thickness is 2.5 um. Cantilevers and bridges are fabricated with electroplated gold and silicon nitride deposited on substrate. An aluminium sacrificial layer was evaporated thermally and removed in various wet etching solutions. Detachment length of cantilever is 200 um and detachment length of bridge is 1 mm after isooctane rinsing. And the SAMs coating condition which is appropriate for gold and nitride are studied respectively.

• Journal of the Microelectronics and Packaging Society
• /
• v.16 no.4
• /
• pp.5-8
• /
• 2009

In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

• Progress in Superconductivity and Cryogenics
• /
• v.4 no.1
• /
• pp.4-7
• /
• 2002

Samples of $Nb/Al-AlO_x/Nb$ tunnel junction with the size of $50 ${\mu}{\textrm}{m}$ {\times} 50 ${\mu}{\textrm}{m}$$ were fabricated by using self-aligning and reactive ion etching technique In the high quality samples, the $V_m$ value (the product of the critical current and subgap resistance measured at 2 mV) was 34 mV at the critical current density of $J_c: 500 A/cm^2 and the V_g$ value (the gap voltage) was 2.8 mV. For the higher $J_c$ sample, voltage fluctuation at the gap voltage was observed. The $V_m and J_c$ values for this sample were 8 mV and 900 A/cm$^2$, respectively. Also, the relationship between critical current density $J_c$ and specific normal conductance $G_s$ of the junctions with $J_c$ in the range of 28 A/cm$^2$~940 A/cm$^2$was investigated.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.9 no.3
• /
• pp.289-294
• /
• 1999

The charged clusters or particles, which contain hundreds to thousands of atoms or even more, are suggested to from in the gas phase in the thin film processes such as CVD, thermal evaporation, laser ablation, and flame deposition. All of these processes are also phase synthesis of the nanoparticels. Ion-induced or photo-induced nucleation is the main mechanism for the formation of these nanoclusters or nanoparticles in the gas phase. Charge clusters can make a dense film because of its self-organizing characteristics while neutral ones make a porous skeletal structure because of its Brownian coagulation. The charged cluster model can successfully explain the unusual phenomenon of simultaneous deposition and etching taking place in diamond and silicon CVD processes. It also provides a new interpretation on the selective deposition on a conducting material in the CVD process. The epitaxial sticking of the charged clusters on the growing surface is getting difficult as the cluster size increases, resulting in the nanostructure such as cauliflower or granular structures.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.31 no.6 s.261
• /
• pp.679-685
• /
• 2007

Superhydrophobic surface, with a water contact angle greater than $150^{\circ}$, has a self-cleaning effect termed 'Lotus effect'. This surface is created by the combination of rough surface and the low surface energy. We proposed square pillar and square shapes to control surface roughness. Microstructure arrays are fabricated by DRIE(Deep Reactive Ion Etching) process and followed by PPFC(Plasma Polymerized Fluorocarbon) deposition. On the experimental result, contact angle at square pillar arrays is well matched with Cassie's model and largest contact angle is $173.37^{\circ}$. But contact angle of square pore shape arrays is lower than Cassie's theoretical contact angle about $5{\sim}10%$. Nevertheless, square pore arrays have more rigidity than square pillar arrays.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.38-38
• /
• 2010

Ever since the experimental discovery of graphene exfoiliated from the graphite flakes by Geim et at., this area has drawn a lot of attention for its possible application in IT industry. For the growth of graphene, chemical vapor deposition (CVD) has been widely used to fabricate the large area graphene. The lateral size of this graphene can be easily controlled by the size of the metal substrate though the chemical etching to remove this substrate is somewhat troublesome. Another problem which is hard to avoid is the folding at the grain boundary. We will discuss the origin of the folding first and introduce the way to avoid this folding. To solve this problem, we have used the various types of micro-thin metal foils. The precise control of hydro-carbon and the carrier gas results in the formation of the graphene on top of substrate. The thickness of graphene layers can be controlled with the control of gas flow on top of Cu substrate in contrast to the previously reported self-limiting growth $behavior^1$. Uniformity of this graphene layer has been checked by micro-raman spectroscopy and SEM. The size of grain can be enhanced by thermal treatment or use of other metal substrate. The dependence of grain size on the lattice size of the substrate will be discussed. By selecting the shape of substrate, we can grow various types of graphene. We will introduce the micron size graphene tube and its application.

• Journal of Industrial and Engineering Chemistry
• /
• v.68
• /
• pp.387-392
• /
• 2018

Various technical approaches and concepts have been proposed to develop conductive super-hydrophobic (SH) surfaces. However, most of these approaches are not usable in practical applications because of insufficient adhesion and cost issues. Additionally, durability and uniformity issues are still in need of improvement. The goal of this research is to produce a large-area conductive SH surface with improved adhesion performance and uniformity. To this end, carbon nanotubes (CNT) with a high aspect ratio and elastomeric polymer were utilized as a conductive filler and matrix, respectively, to form a coating layer. Additionally, nanoscale silica particles were utilized for stable implementation of the conductive SH surface. To improve the adhesion properties between the SH coating layer and substrate, pretreatment of the substrate was conducted by utilizing both wet and dry etching processes to create specific organic functional groups on the substrate. Following pretreatment of the surface, a zirco-aluminate coupling agent was utilized to enhance adhesion properties between the substrate and the SH coating layer. Raman spectroscopy revealed that adhesion was greatly improved by the formation of a chemical bond between the substrate and the SH coating layer at an optimal coupling agent concentration. The developed conductive SH coating attained a high electromagnetic interference (EMI) shielding effectiveness, which is advantageous in self-cleaning EMI shielding applications.