• Journal of IKEEE
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• v.19 no.1
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• pp.94-100
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• 2015

In this paper, 50V power U-MOSFET which replace the body(PN) diode with Schottky is proposed. As already known, Schottky diode has the advantage of reduced reverse recovery loss than PN diode. Thus, the power MOSFET with integrated Schottky integrated can minimize the reverse recovery loss. The proposed Schottky body diode U-MOSFET(SU-MOS) shows reduction of reverse recovery loss with the same transfer, output characteristic and breakdown voltage. As a result, 21.09% reduction in peak reverse current, 7.68% reduction in reverse recovery time and 35% improvement in figure of merit(FOM) are observed when the Schottky width is $0.2{\mu}m$ and the Schottky barrier height is 0.8eV compared to conventional U-MOSFET(CU-MOS). The device characteristics are analyzed through the Synopsys Sentaurus TCAD tool.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2265-2269
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• 2011

1 kV high-voltage GaN Schottky diode is realized using GaN-on-Si template by oxidizing Ni-Schottky contact. The Auger electron spectroscopy (AES) analysis revealed the formation of $NiO_x$ at the top of Schottky contact. The Schottky contact was changed to from Ni/Au to Ni/Ni-Au alloy/Au/$NiO_x$ by oxidation. Ni diffusion into AlGaN improves the Schottky interface and the trap-assisted tunneling current. In addition, the reverse leakage current and the isolation-leakage current are efficiently suppressed by oxidation. The isolation-leakage current was reduced about 3 orders of magnitudes. The reverse leakage current was also decreased from 2.44 A/$cm^2$ to 8.90 mA/$cm^2$ under -100 V-biased condition. The formed group-III oxides ($AlO_x$ and $GaO_x$) during the oxidation is thought to suppress the surface leakage current by passivating surface dangling bonds, N-vacancies and process damages.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.66-74
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• 2012

In this paper, the impact of segregation layer density ($N_{DSL}$) and length ($L_{DSL}$) on scalability and analog/RF performance of dopant-segregated Schottky barrier (DSSB) SOI MOSFET has been investigated in sub-30 nm regime. It has been found that, although by increasing the $N_{DSL}$ the increased off-state leakage, short-channel effects and the parasitic capacitances limits the scalability, the reduced Schottky barrier width at source-to-channel interface improves the analog/RF figures of merit of this device. Moreover, although by reducing the $L_{DSL}$ the increased voltage drop across the underlap length reduces the drive current, the increased effective channel length improves the scalability of this device. Further, the gain-bandwidth product in a common-source amplifier based on optimized DSSB SOI MOSFET has improved by ~40% over an amplifier based on raised source/drain ultrathin-body SOI MOSFET. Thus, optimizing $N_{DSL}$ and $L_{DSL}$ of DSSB SOI MOSFET makes it a suitable candidate for future nanoscale analog/RF circuits.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.834-838
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• 2002

In this paper, we have fabricated 4H-SiC schottky diodes utilizing a metal-oxide overlap structure for electric filed termination. The barrier height and Ideality factor were measured by current-voltage, capacitance-voltage characteristics. Schottky barrier height(SBH) were 1.41ev for Ni and 1.35eV for Pt, 1.52eV for Pt/Ti at room temperature and Pt/Ti Schottky diode exhibited Ideality factor was 1.06 to 1.4 in the range of $25^{\circ}C{\sim}200^{\circ}C$. To improve the reverse bias characteristics, an edge termination technique is employed for Pt/Ti/4H-SiC Schottky rectifiers and the device show excellent characteristics with higher blocking voltage up to 780V compared with unterminated devices.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.330-333
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• 1999

A Schottky characteristic is one of the important properties to determine the performance of GaN electronic devices. In this paper, we have studied how to improve the property after n$^{+}$ layer etching by ICP(Induced Coupled Plasma)-RIE(Reactive ion Etching). We have tried $N_2$radiation, annealing after $N_2$radiation, and annealing in $N_2$environment. We have found that a simple annealing method in $N_2$environment is enough to improve the Schottky characteristic for electronic device-Quality application.n.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.938-940
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• 1999

We have fabricated SiC Schottky diode for high temperature applications. SiC thin film for drift region has been deposited by ICP-CVD. In order to establish metallization conditions, we have extracted the device parameters of the Schottky diode from the forward I-V characteristics and the C-V characteristics as a function of temperature. The ideality factor was varied from 2.07 to 1.15 and the barrier height was also varied from 1.26eV to 1.92eV with increase of temperature. The reverse blocking voltage was 183 V.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.2
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• pp.230-234
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• 1996

A new trenched Hybrid Schottky INjection Field Effect Transistor (HSINFET) is proposed and verified by 2-D semiconductor device simulation. The feature of the proposed structure is that the hybrid Schottky injector is implemented at the trench sidewall and p-n junction injector at the upper sidewall and bottom of a trench. Two-dimensional simulation has been performed to compare the new HSINFET with the SINFET, conventional HSINFET and lateral insulated gate bipolar transistor(LIGBT). The numerical results shows that the current handling capability of the proposed HSINFET is significantly increased without sacrificing turn-off characteristics. The proposed HSINFET exhibits higher latch-up current density and much faster switching speed than the lateral IGBT. The forward voltage drop of the proposed HSINFET is 0.4 V lower than that of the conventional HSINFET and the turn-off time of the trenched HSINFET is much smaller than that of LIGBT.

• Journal of information and communication convergence engineering
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• v.16 no.4
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• pp.248-251
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• 2018

To research the characteristics of $TiO_2$ as an insulator, $TiO_2$ films were prepared with various annealing temperatures. It was researched the currents of $TiO_2$ films with Schottky barriers in accordance with the contact's properties. The potential barrier depends on the Schottky barrier and the current decreases with increasing the potential barrier of $TiO_2$ thin film. The current of $TiO_2$ film annealed at $110^{\circ}C$ was the lowest and the carrier density was decreased and the resistivity was increased with increasing the hall mobility. The Schottky contact is an important factor to become semiconductor device, the potential barrier is proportional to the hall mobility, and the hall mobility increased with increasing the potential barrier and became more insulator properties. The reason of having the high mobility in the thin films in spite of the lowest carrier concentration is that the conduction mechanism in the thin films is due to the band-to-band tunneling phenomenon of electrons.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.4
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• pp.484-489
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• 1986

A device with variable stepped oxide layer along the edge region of Schottky junction have been designed and fabricated. The effect of this stepped oxide layer in the edge region improves the breakdown voltage as a result of the by increase of the depletion layer width, and decreases the leakage current as compared to the effect of conventional field oxide layer, when the reverse voltage was applied. Experimental results shown that the Schottky diode with the the reverse voltage was applied. Experimenal results show that the Schottky diode with the optimal stepped oxide layer maintains nearly ideal I-V characteristics and excellent breakdown voltage(170V) by reducing the edge effect inherent in metal-semiconductor contacts. The optimal conditions of stepped oxide layer are 1700\ulcornerin thickness and 10\ulcorner in length.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.4
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• pp.659-665
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• 2017

Power semiconductor devices required the low on-resistance and high breakdown voltage. Wide band-gap materials opened a new technology of the power devices which promised a thin drift layer at an identical breakdown voltage. The diamond had the wide band-gap of 5.5 eV which induced the low power loss, high breakdown capability, low intrinsic carrier generation, and high operation temperature. We investigated the p-type pseudo-vertical diamond Schottky barrier diodes using a numerical simulation. The impact ionization rate was material to calculating the breakdown voltage. We revised the impact ionization rate of the diamond for adjusting the parallel-plane breakdown field at 10 MV/cm. Effects of the field plate on the breakdown voltage was also analyzed. A conventional diamond Schottky barrier diode without field plate exhibited the high forward current of 0.52 A/mm and low on-resistance of $1.71{\Omega}-mm$ at the forward voltage of 2 V. The simulated breakdown field of the conventional device was 13.3 MV/cm. The breakdown voltage of the conventional device and proposed devices with the $SiO_2$ passivation layer, anode field plate (AFP), and cathode field plate (CFP) was 680, 810, 810, and 1020 V, respectively. The AFP cannot alleviate the concentration of the electric field at the cathode edge. The CFP increased the breakdown voltage with evidences of the electric field and potential. However, we should consider the dielectric breakdown because the ideal breakdown field of the diamond is higher than that of the $SiO_2$, which is widely used as the passivation layer. The real breakdown voltage of the device with CFP decreased from 1020 to 565 V due to the dielectric breakdown.