• Title/Summary/Keyword: Samsung Electronic

Search Result 645, Processing Time 0.028 seconds

Surface modification using KrF laser irradiation for properties improvement of poros siloxane materials (다공성 실록샌 물질의 박막특성 향상을 위한 KrF laser 표면개질)

  • Kim, Jung-Bae;Jeong, Hyun-Dam;Lee, Sun-Young;Yim, Jin-Heong;Rhee, Ji-Hoon;Shin, Hyeon-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2002.11a
    • /
    • pp.240-243
    • /
    • 2002
  • 반도체 소자의 고속화, 고접적화에 따라 집적회로의 최소 선폭이 감소할수록 device 의 신호지연, 잡음 및 전력소모 등이 증가하는 문제점이 있다. 이러한 문제점을 개선하기 위해서 저유전율의 층간 절연막이 절대적으로 필요하다. 본 실험에서는 KrF laser 조사를 이용한 표면개질 방법으로 다공성 절연막의 박막특성의 향상을 시도하였다. 다공성 절연막을 층간 절연막으로 응용할 경우 반도체 공정 적용성을 향상시키기 위하여 다공성 절연막의 표면개질이 필요하다. 표면개질 전후의 유전율 변화는 박막을 MIM구조로 측정하였고 화학 구조의 변화는 time-of flight secondary ion mass spectrometry(TOF-SIMS)를 이용하여 관찰하였다. 다공성 실록샌 물질의 pore로 인해서 생긴 누설전류 및 흡습 문제를 개선시키고 유전율을 감소시킬 수 있는 것을 알 수 있었다.

  • PDF

Thermal stabilities and dynamic mechanical properties of dielectric materials for next generation PCB

  • Cho, Jae-Choon;Lee, Hya-Young;Lim, Sung-Taek;Park, Moon-Su;Lee, Keun-Yong;Oh, Jun-Lok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.06a
    • /
    • pp.253-253
    • /
    • 2008
  • Recently, high performance microelectronic devices are designed in multi-layer structure in order to make dense wiring of metal conductors in compact size. For making dense wiring of metal conductors, we investigated CTE and peel strength of dielectric materials for next generation PCB. It is an object of this research to develop an epoxy resin composition for an interlayer insulating material exhibiting low CTE and high peel strengnth and making an insulating layer thinner.

  • PDF

Issues in CMP Technology and Future Challenges for Sub-100nm Devices (100nm 이하 Device에서의 CMP 기술의 문제점 및 향후 도전과제)

  • Yun, Seong-Kyu;Lee, Jae-Dong;Hong, Chang-Ki;Cho, Han-Ku;Moon, Joo-Tae;Ryu, Byoung-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2004.07a
    • /
    • pp.224-226
    • /
    • 2004
  • CMP process requirements become tighter especially in sub-100nm technology. Especially, high planarity and low defectivity appear as leading issues in CMP technology. Also, the introduction of new materials and advanced lithography technique increases CMP applications. Here are listed some major issues and challenges in CMP technology, which can be categorized following four items. These have practical significance and should be considered more concretely for future generation.

  • PDF

The Properties of Fine Drop Jetting Actuator at Various PZT Powder Composition (파우더 조성에 따른 PZT의 미세액적 토출 액츄에이터 특성)

  • Kim, Young-Jae;Yoo, Young-Seuck;Park, Sung-Jun;Kim, Soon-Young;Sim, Won-Chul;Hong, Sae-Won;Joung, Jae-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2005.07a
    • /
    • pp.340-341
    • /
    • 2005
  • Three different composition 130um thickness PZT were fabricated by extrusion method and burned out at $550^{\circ}C$ and sintered at $1260^{\circ}C$/2.5hrs. Actuator was fabricated using glass and Si(100) wafer by MEMS process. From XRD data, in case of DECH, perovskite phase peak strength is higher than others. We were able to obtain the information of grain growth and porosity by SEM images. Also DECH PZT on glass membrane(100um thickness) have larger displacement than others.

  • PDF

Surface Modification for Improving Adhesion between Etching Resist and Copper Substrate (Etching resist와 Copper substrate 간의 Adhesion 향상을 위한 표면개질)

  • Park, Sung-Jun;Seo, Shang-Hoon;Kim, Yong-Sik;Kim, Tae-Gu;Lee, Sang-Gyun;Joung, Jae-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2006.06a
    • /
    • pp.129-129
    • /
    • 2006
  • 인쇄회로를 제작하기 위하여 기판상에 에칭 레지스트, 도금막, 절연재료, 솔더 마스크 등을 패터닝 하게 되는데, 일반적으로 이러한 유기체 막들은 대부분 액상이나 고형의 필름 형태로 패턴을 형성하게 된다. 형성된 패턴과 동박과의 접착력 향상이 가장 주요한 문제점 중의 하나이다. 상대적으로 편평한 동박면과 유기체 막과의 접착력을 향상시키기 위해 일반적으로 접촉 면적을 증가시키기 위한 표면개질을 하게 된다. 기계적 브러싱이나 스크러빙에 의해서도 기판상의 동박의 surface topography 를 개선하기 위한 노력이 시도 되고 있지만, 본 연구에서는 microetching 방법에 의해서 화학적으로 동박 표면상에 최대한 요철을 많이 형성하여 에칭 레지스트와 동박 간의 접착력을 증대시키기 위한 연구를 수행하였다.

  • PDF

Study on optimization of CMP Conditioning (CMP Conditioning 최적화에 관한 연구)

  • Han, Sang-Yeob;Yun, Seong-Kyu;Yoon, Bo-Un;Hong, Chang-Ki;Cho, Han-Ku;Moon, Joo-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2006.06a
    • /
    • pp.51-54
    • /
    • 2006
  • 본 연구는 CMP 공정 중의 Conditioning 최적화에 관한 내용이다. CMP Pad Conditioner의 역할은 CMP 공정 중 Slurry 및 연마 잔유물에 의해 Pad 표면에 눈막힘 현상(Glazing)이 발생하여 Wafer의 연마속도가 급속히 저하되는 현상을 방지하여 공정의 안정성을 향상시키는 데 있다. 본 연구 중 Conditioning은 In-situ 방식으로 진행되었으며, Conditioning 비율을 Polishing Time 대비 50%만 진행하여도 연마속도 저하현상은 나타나지 않음을 확인하였다. 이로써 Pad 마모랑 감소 및 Conditioner 교체 주기연장이 가능해져, CMP 공정의 Cost를 절감할 수 있다.

  • PDF

A study of Recess Channel Array Transistor with asymmetry channel for high performance and low voltage Mobile 90nm DRAMs (고성능 저전압 모바일향 90nm DRAM을 위한 비대칭 채널구조를 갖는 Recess Channel Array Transistor의 제작 및 특성)

  • Kim, S.B.;Lee, J.W.;Park, Y.K.;Shin, S.H.;Lee, E.C.;Lee, D.J.;Bae, D.I.;Lee, S.H.;Roh, B.H.;Chung, T.Y.;Kim, G.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2004.11a
    • /
    • pp.163-166
    • /
    • 2004
  • 모바일향 90nm DRAM을 개발하기 위하여 비대칭 채널 구조를 갖는 Recess Channel Array Transistor (RCAT)로 cell transistor를 구현하였다. DRAM cell transistor에서 junction leakage current 증가는 DRAM retention time 열화에 심각한 영향을 미치는 요인으로 알려져 있으며, DRAM의 minimum feature size가 점점 감소함에 따라 short channel effect의 영향으로 junction leakage current는 더욱 더 증가하게 된다. 본 실험에서는 short channel effect의 영향에 의한 junction leakage current를 감소시키기 위하여 Recess Channel Array Transistor를 도입하였고, cell transistor의 채널 영역을 비대칭으로 형성하여 data retention time을 증가시켰다. 비대칭 채널 구조을 이용하여 Recess Channel Array Transistor를 구현한 결과, sub-threshold 특성과 문턱전압, Body effect, 그리고, GIDL 특성에는 큰 유의차가 보이지 않았고, I-V특성인 드레인 포화전류(IDS)는 대칭 채널 구조인 transistor 대비 24.8% 정도 증가하였다. 그리고, data retention time은 2배 정도 증가하였다. 본 실험에서 얻은 결과는 향후 저전압 DRAM 개발과 응용에 상당한 기여를 할 것으로 기대된다.

  • PDF

Fabrication of an HTS DC SQUID Electronic Gradiometer and it's application in NDE system (고온 초전도 Electronic Gradiometer의 제작과 NDE system 에의 응용)

  • Kim, Jin-Young;Han, Sung-Gun;Kang, Joon-Hee;Lee, Eun-Hong;Song, I-Hun
    • 한국초전도학회:학술대회논문집
    • /
    • v.9
    • /
    • pp.120-123
    • /
    • 1999
  • We designed and constructed a non-destructive evaluation system using an HTS DC SQUID electronic gradiometer. Our DC SQUID electronic gradiometer is composed of two DC SQUID magnetometers. The system included a non-magnetic stainless steel cryostat and a set of coaxial exciting coils, which were used to induce an eddy current in the test material. We also have calculated the eddy current density produced by an exciting coil in any direction of the testing object. We could compute the eddy current density distribution in 3D. The SQUIDs were computer controlled and the output data from the electronic gradiometer was obtained by using a Labview software.

  • PDF

Thermite Reaction Between CuO Nanowires and Al for the Crystallization of a-Si

  • Kim, Do-Kyung;Bae, Jung-Hyeon;Kim, Hyun-Jae;Kang, Myung-Koo
    • Transactions on Electrical and Electronic Materials
    • /
    • v.11 no.5
    • /
    • pp.234-237
    • /
    • 2010
  • Nanoenergetic materials were synthesized and the thermite reaction between the CuO nanowires and the deposited nano-Al by Joule heating was studied. CuO nanowires were grown by thermal annealing on a glass substrate. To produce nanoenergetic materials, nano-Al was deposited on the top surface of CuO nanowires. The temperature of the first exothermic reaction peak occurred at approximately $600^{\circ}C$. The released heat energy calculated from the first exothermic reaction peak in differential scanning calorimetry, was approximately 1,178 J/g. The combustion of the nanoenergetic materials resulted in a bright flash of light with an adiabatic frame temperature potentially greater than $2,000^{\circ}C$. This thermite reaction might be utilized to achieve a highly reliable selective area crystallization of amorphous silicon films.

Design and Construction of an HTS DC SQUID Electronic Gradiometer NDE system

  • Kim, J.Y.;Han, S.G.;Kang, J.H.;Lee, E.H.;Song, I.H.
    • Progress in Superconductivity
    • /
    • v.1 no.2
    • /
    • pp.115-119
    • /
    • 2000
  • We designed and constructed a non-destructive evaluation system using an HTS DC SQUID electronic gradiometer. Our DC SQUID electronic gradiometer is composed of two DC SQUID magnetometers. The system included a non-magnetic stainless steel cryostat and a set of coaxial exciting coils, which were used to induce an eddy current in the test piece. We also have calculated the eddy current density produced by an exciting coil in any direction of the testing object. We could compute the eddy current density distribution in 3D. The SQUIDs were computer controlled and the output data from the electronic gradiometer was obtained by using a Labview software.

  • PDF