• 제목/요약/키워드: Ripple generation network

검색결과 8건 처리시간 0.018초

COT 제어 플라이벅 컨버터를 위한 전압 리플 보상회로의 분석 및 설계 (Analysis and Design for Ripple Generation Network Circuit in Constant-on-Time-Controlled Fly-Buck Converter)

  • 조영훈;장바울
    • 전력전자학회논문지
    • /
    • 제27권2호
    • /
    • pp.106-117
    • /
    • 2022
  • Multiple output converters can be utilized when various output voltages are required in applications. Recently, one of the multiple output converters called fly-buck has been proposed, and has attracted attention due to the advantage that multiple output can be easily obtained with a simple structure. When constant on-time (COT) control is applied, the output ripple voltage must be treated carefully for control stability and voltage regulation characteristics in consideration of the inherent energy transfer characteristics of the fly-buck converter. This study analyzes the operation principle of the fly-buck converter with a ripple generation network and presents the design guideline for the improved output voltage regulation. Validity of the analysis and design guideline is verified using a 5 W prototype of the COT controlled fly-buck converter with a ripple generation network for telecommunication auxiliary power supply.

신경회로망기법을 이용한 SRM 드라이브의 토오크리플 저감방안 (Torque Ripple Reduction Method of SRM Drives Using Neural Network Technique)

  • 이성두;정태욱;안진우;황영문
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1997년도 하계학술대회 논문집 A
    • /
    • pp.227-229
    • /
    • 1997
  • The torque of SRM is developed by phase currents and inductance variation. The inductance of torque generation region is nonlinearly varied according to phase current. By this nonlinear characteristics, torque ripple can be generated on the condition of constant current. Otherwise, phase current should be controlled instantaneously in accordance with inductance to reduce torque ripple. In this paper, the control system with neural network that can reduce torque ripple is suggested. In this control system, instantaneous inductance and optimal current waveform for smallest torque ripple is obtained by neural network. And this required optimal current waveform is regulated by voltage control.

  • PDF

DWDM기반의 차세대 광인터넷에서 QoS 기반의 제한적 플러딩 RWA 알고리즘에 관한 연구 (QoS-Aware Bounded Flooding RWA Algorithm in the Next Generation Optical Internet based on DWDM Networks)

  • 김용성;이재동;황진호;우종호
    • 대한전자공학회논문지TC
    • /
    • 제43권8호
    • /
    • pp.1-14
    • /
    • 2006
  • 실시간 멀티미디어 서비스들을 전송하는 DWDM(Dense-Wavelength Division Multiplexing) 기반의 차세대 인터넷에서는 DWDM 망의 다양한 QoS(Quality of Service) 파라미터들을 복합적으로 고려하는 QoS RWA(Routing and Wavelength Assignment) 방식으로의 접근이 요구되어진다. 본 논문은 flooding 방법을 기반으로 하고, 다중제약조건을 만족하는 새로운 QoS 라우팅 알고리즘인 Bounded Flooding Routing (BFR)을 제안한다. BFR 알고리즘의 주요 목적은 network overhead, blocking probability 그리고 wavelength utilization의 성능 분석 파라메터의 향상에 있다. 더욱이, 이러한 목적을 달성하기 위해 본 논문에서는 새로운 개념인 ripple count 개념을 제안하여, 링크 상태정보 및 계산량을 줄임으로써 라우팅의 성능을 높인다. 또한, 제안된 알고리즘의 광범위한 분석을 위해서, DWDM을 기반으로 하는 망에서 중요한 요소인 제한된 파장 변환기를 적용한다. 제안된 BFR 알고리즘의 성능분석 결과는 본 논문에서 제시하는 방법이 network overhead, blocking Probability 그리고 wavelength utilization 측면의 성능 평가를 통해 제안된 알고리즘들의 효율성을 검증하였다.

입력전류와 커패시터 전압의 맥동저감을 위한 개선된 LCCT Z-소스 DC-AC 인버터 (Improved LCCT Z-Source DC-AC Inverter for Ripple Reduction of Input Current and Capacitor Voltage)

  • 신연수;정영국;임영철
    • 전기학회논문지
    • /
    • 제61권10호
    • /
    • pp.1432-1441
    • /
    • 2012
  • In this study, an improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source inverter(Improved LCCT ZSI) with characteristics of Quasi Z-source inverter(QZSI) and LCCT Z-source inverter(LCCT ZSI) is proposed. The proposed inverter can also reduce the voltage stress and input current/capacitor voltage ripples compared with conventional LCCT ZSI and Quasi ZSI. A two winding trans in Z-impedance network of the conventional LCCT ZSI is replaced by a three winding trans in the proposed inverter. To verify the validity of the proposed inverter, a DSP controlled hardware was made and PSIM simulation was executed for each method. Comparing the current and voltage ripples of each method under the condition of input DC voltage 70[V] and output AC voltage 76[Vrms], the input current and capacitor voltage ripple factors of the proposed inverter were low as 11[%] and 1.4[%] respectively. And, for generation of the same output AC voltage of each method, voltage stress of the proposed inverter was low as 175[V] under the condition of duty ratio D=0.15. As mentioned above, we could know that the proposed inverter have the characteristics of low voltage stress, low ripple factor and low operation duty ratio compared with the conventional methods. Finally, the efficiency according to load change/duty ratio and the transient state characteristics were discussed.

전력 무결성을 위한 온 칩 디커플링 커패시터 (On-chip Decoupling Capacitor for Power Integrity)

  • 조승범;김사라은경
    • 마이크로전자및패키징학회지
    • /
    • 제24권3호
    • /
    • pp.1-6
    • /
    • 2017
  • As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

Implementation of a High Efficiency Grid-Tied Multi-Level Photovoltaic Power Conditioning System Using Phase Shifted H-Bridge Modules

  • Lee, Jong-Pil;Min, Byung-Duk;Yoo, Dong-Wook
    • Journal of Power Electronics
    • /
    • 제13권2호
    • /
    • pp.296-303
    • /
    • 2013
  • This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

커플드 인덕터를 활용하여 출력 전류 리플을 저감하는 LLC 공진형 컨버터에 관한 연구 (A Study on LLC Resonant Converter Employing Coupled Inductor to Reduce Output Current Ripple)

  • 이용철;강민혁;강찬호;홍성수
    • 전력전자학회논문지
    • /
    • 제23권3호
    • /
    • pp.208-216
    • /
    • 2018
  • In this paper, an LLC resonant converter employing two coupled inductors on the secondary side of the converter is proposed. The conventional LLC converter exhibits serious power loss during secondary winding of the transformer because of generation of tremendous output current ripples. To overcome this problem, an LLC resonant converter with a current doubler as a rectifying circuit was recently proposed. However, the current-doubler rectifying circuit requires coupled inductors with a high coupling ratio to retain the designed resonance characteristics. Therefore, an additional hardware filter is required at the output stage to address large output current ripples. Additional design procedures are also necessary because the inductance component of the added filter affects the designed resonant network. To solve this issue, an LLC resonant converter employing two coupled inductors is proposed in this paper. Mathematical analysis shows that the proposed secondary-side current-doubler circuit does not affect the designed resonance characteristics. The operating principles and theoretical analyses are proven through a simulation and experiments with a 54 V/28 A prototype.

Analysis and Implementation of PS-PWAM Technique for Quasi Z-Source Multilevel Inverter

  • Seyezhai, R.;Umarani, D.
    • Journal of Electrical Engineering and Technology
    • /
    • 제13권2호
    • /
    • pp.688-698
    • /
    • 2018
  • Quasi Z-Source Multilevel Inverter (QZMLI) topology has attracted grid connected Photovoltaic (PV) systems in recent days. So there is a remarkable research thrust in switching techniques and control strategies of QZMLI. This paper presents the mathematical analysis of Phase shift- Pulse Width Amplitude Modulation (PS-PWAM) for QZMLI and emphasizes on the advantages of the technique. The proposed technique uses the maximum and minimum envelopes of the reference waves for generation of pulses and proportion of it to generate shoot-through pulses. Hence, it results in maximum utilization of input voltage, lesser switching loss, reduced Total Harmonic Distortion (THD) of the output voltage, reduced inductor current ripple and capacitor voltage ripple. Due to these qualities, the QZMLI with PS-PWAM emerges to be the best suitable for PV based grid connected applications compared to Phase shift-Pulse Width Modulation (PS-PWM). The detailed math analysis of the proposed technique has been disclosed. Simulation has been performed for the proposed technique using MATLAB/Simulink. A prototype has been built to validate the results for which the pulses were generated using FPGA /SPARTAN 3E.