• Title/Summary/Keyword: Register Level

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A Study on Design of BIST for Circuits with Pipeline Architecture (파이프라인 구조를 갖는 회로를 위한 내장된 자체 검사 설계에 관한 연구)

  • Yang, Sun-Woong;Han, Jae-Cheon;Jin, Myung-Koo;Chang, Hoon
    • Proceedings of the KIEE Conference
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    • 1998.11b
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    • pp.600-602
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    • 1998
  • In this paper, we implement BIST to efficiently test circuits with pipeline architecture and JTAG to control implemented BIST and support board level test. Since implemented BIST is designed to be initialized using new seed, hard-to-detect faults are easily detected. Besides, to optimize area overhead, it uses JTAG instead of BIST controller and modified pipeline register instead of added test pattern generator and signature generator. And, to optimize pin overhead, it uses pins of JTAG. Function and efficiency of implemented BIST is verified by simulation.

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A New Approach for Accurate RTL Power Macro-Modeling

  • Kawauchi, Hirofumi;Taniguchi, Ittetsu;Fukui, Masahiro
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.11-19
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    • 2010
  • Register transfer level power macromodeling is well known as a promising technique for accurate and efficient power estimation. This paper proposes effective approaches based on the tablebased method for the RTL power macro-modeling. The new parameter SD, which characterizes the distribution of switching activities for each gate in the circuit, is one of the contributions. The new parameter SD has strong correlation with power consumption. We also propose an accurate table reference method considering the circuit characteristics. The table reference method is applicable for every table-based method and outputs more accurate power value. The experimental results show that the combination of the proposed methods reduces max error 30.36% in the best case, comparing conventional methods. The RMS error is also improved 1.70% in the best case.

Development and Evaluation of PDF Report Annotation Tool GABA Facilitating Comment Reuse

  • Kakeshita, Tetsuro;Motoyama, Shoichi
    • International Journal of Contents
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    • v.9 no.2
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    • pp.22-26
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    • 2013
  • Comparing online and paper-based environment for report submission and correction, the former supersedes to the latter, since (1) the turn-around time becomes shorter, (2) teaching opportunity increases, and (3) as a consequence, the student's achievement level becomes higher in the online environment. In this paper, we propose an annotation tool GABA for PDF document in order to reduce correction time by the teachers and to facilitate instruction to students. In a usual class, the same or similar assignments are given to the students. Then it is often the case that many students make similar mistakes. A teacher can register and classify common correction comments to GABA. Report correction time becomes significantly shorter by reusing the registered comments. GABA also provides various support functions in order to assist efficient checking of numerous report files such as (1) sorting of frequently-used comments, (2) similarity-based file sorting, and (3) cross tabulation of comments using category and weight.

Power analysis attack resilient block cipher implementation based on 1-of-4 data encoding

  • Shanmugham, Shanthi Rekha;Paramasivam, Saravanan
    • ETRI Journal
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    • v.43 no.4
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    • pp.746-757
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    • 2021
  • Side-channel attacks pose an inevitable challenge to the implementation of cryptographic algorithms, and it is important to mitigate them. This work identifies a novel data encoding technique based on 1-of-4 codes to resist differential power analysis attacks, which is the most investigated category of side-channel attacks. The four code words of the 1-of-4 codes, namely (0001, 0010, 1000, and 0100), are split into two sets: set-0 and set-1. Using a select signal, the data processed in hardware is switched between the two encoding sets alternately such that the Hamming weight and Hamming distance are equalized. As a case study, the proposed technique is validated for the NIST standard AES-128 cipher. The proposed technique resists differential power analysis performed using statistical methods, namely correlation, mutual information, difference of means, and Welch's t-test based on the Hamming weight and distance models. The experimental results show that the proposed countermeasure has an area overhead of 2.3× with no performance degradation comparatively.

Characteristic comparison of various arbitration policies using TLM method (TLM 방법을 이용한 다양한 중재 방식의 특성 비교)

  • Lee, Kook-Pyo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.8
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    • pp.1653-1658
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    • 2009
  • SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM, SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. In this study, we compare the characteristics of various arbitration policies using TLM(Transaction Level Model) method. Fixed priority, round-robin, TDMA and Lottery bus policies are used in general arbitration method. We analyze the merit and demerit of these arbitration policies.

Design of an FPGA-Based RTL-Level CAN IP Using Functional Simulation for FCC of a Small UAV System

  • Choe, Won Seop;Han, Dong In;Min, Chan Oh;Kim, Sang Man;Kim, Young Sik;Lee, Dae Woo;Lee, Ha-Joon
    • International Journal of Aeronautical and Space Sciences
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    • v.18 no.4
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    • pp.675-687
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    • 2017
  • In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.

An Assignment Motion to Suppress the Unnecessary Code Motion (불필요한 코드 모션 억제를 위한 배정문 모션)

  • Shin, Hyun-Deok;Lee, Dae-Sik;Ahn, Heui-Hak
    • Journal of Internet Computing and Services
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    • v.9 no.1
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    • pp.55-67
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    • 2008
  • This paper presents the assignment motion algorithm unrestricted for code optimization computationally. So, this algorithm is suppressed the unnecessary code motion in order to avoid the superfluous register pressure, we propose the assignment motion algorithm added to the final optimization phase. This paper improves an ambiguous meaning of the predicate. For mixing the basic block level analysis with the instruction level analysis, an ambiguity occurred in Knoop's algorithm. Also, we eliminate an ambiguity of it. Our proposal algorithm improves the runtime efficiency of a program by avoiding the unnecessary recomputations and reexecutions of expressions and assignment statements.

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Multi-dimensional Query Authentication for On-line Stream Analytics

  • Chen, Xiangrui;Kim, Gyoung-Bae;Bae, Hae-Young
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.4 no.2
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    • pp.154-173
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    • 2010
  • Database outsourcing is unavoidable in the near future. In the scenario of data stream outsourcing, the data owner continuously publishes the latest data and associated authentication information through a service provider. Clients may register queries to the service provider and verify the result's correctness, utilizing the additional authentication information. Research on On-line Stream Analytics (OLSA) is motivated by extending the data cube technology for higher multi-level abstraction on the low-level-abstracted data streams. Existing work on OLSA fails to consider the issue of database outsourcing, while previous work on stream authentication does not support OLSA. To close this gap and solve the problem of OLSA query authentication while outsourcing data streams, we propose MDAHRB and MDAHB, two multi-dimensional authentication approaches. They are based on the general data model for OLSA, the stream cube. First, we improve the data structure of the H-tree, which is used to store the stream cube. Then, we design and implement two authentication schemes based on the improved H-trees, the HRB- and HB-trees, in accordance with the main stream query authentication framework for database outsourcing. Along with a cost models analysis, consistent with state-of-the-art cost metrics, an experimental evaluation is performed on a real data set. It exhibits that both MDAHRB and MDAHB are feasible for authenticating OLSA queries, while MDAHRB is more scalable.

An Assignment Motion Algorithm to Suppress the Unnecessary Code Motion (불필요한 코드모션 억제를 위한 배정문 모션 알고리즘)

  • Shin, Hyun-Deok;Ahn, Heui-Hak
    • The KIPS Transactions:PartA
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    • v.8A no.1
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    • pp.27-35
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    • 2001
  • This paper presents the assignment motion algorithm unrestricted for code optimization computationally. So, this algorithm is suppressed the unnecessary code motion in order to avoid the superfluous register pressure, we propose the assignment motion algorithm added to the final optimization phase. This paper improves an ambiguous meaning of the predicated. For mixing the basic block level analysis with the instruction level analysis, an ambiguity occurred in knoop’s algorithm. Also, we eliminate an ambiguity of it. Our proposal algorithm improves the runtime efficiency of a program by avoiding the unnecessary recomputations and reexecutions of expressions and assignment statements.

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Knowledge Modeling of Reliability Analysis and Safety Design for Offshore Safety Instrument System with MBSE (Model-Based Systems Engineering) (모델기반 시스템엔지니어링을 활용한 해양플랜트 안전시스템(SIS, Safety Instrumented System)의 신뢰도 분석 및 안전설계 지식 모델링)

  • Bae, Jeong-hoon;Jung, Min-jae;Shin, Sung-chul
    • Journal of the Society of Naval Architects of Korea
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    • v.55 no.3
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    • pp.222-235
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    • 2018
  • The hydrocarbon gas leak in the offshore plant can cause large accidents and lead to significant damages to human, property and environment. For prevention of fire or explosion accidents from gas leak, a SIS(Safety Instrumented System) should be installed. In the early stage of the offshore design, required SIL(Safety Integrated Level) is determined and reliability analysis is performed to verify the design in reliability aspects. This study collected data, information related to reliability analysis and created knowledge model of safety design for the offshore system with MBSE(Model-Based Systems Engineering) concept. Knowledge model could support safety engineer's design tasks as the guidance of reliability analysis procedure of safety design and make good conversation with other engineers in yard, class, company, etc.