• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.9A
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• pp.1101-1107
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• 2004

This paper presents an optimization algorithm and technique for designing parallel Cyclic Redundancy Check (CRC) circuit, which is most widely adopted for error detection A new heuristic algorithm is developed to find as many shared terms as possible, thus eventually to minimize the number and level of the exclusive-or logic blocks in parallel CRC circuits. 16-bit and 32-bit CRC generators are designed with different types of Programmable Logic Devices, and it has been found that our new algorithm and architecture significantly reduce the delay.

• Journal of IKEEE
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• v.21 no.2
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• pp.130-135
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• 2017

Normally, in data transmission, extra parity bits are added to the input message which were derived from its input and a pre-defined algorithm. The same algorithm is used by the receiver to check the consistency of the delivered information, to determine if it is corrupted or not. It recovers and compares the received information, to provide matching and correcting the corrupted transmitted bits if there is any. This paper aims the following objectives: to use an alternative error detection-correction method, to lessens both the fixed number of the required redundancy bits 'r' in cyclic redundancy checking (CRC) because of the required polynomial generator and the overhead of interspersing the r in Hamming code. The experimental results were synthesized using Xilinx Virtex-5 FPGA and showed a significant increase in both the transmission rate and detection of random errors. Moreover, this proposal can be a better option for detecting and correcting errors.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.9
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• pp.321-326
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• 2015

In this paper, we proposed an algorithm which could transmit reliable data between smart devices by using inaudible high frequency of audible frequency range and cyclic redundancy check method. The proposed method uses 18 kHz~22 kHz as high frequency which inner speaker of smart device can make a sound in audible frequency range (20 Hz~22 kHz). To increase transmission quantity of data, we send mixed various frequencies at high frequency range 1 (18.0 kHz~21.2 kHz). At the same time, to increase accuracy of transmission data, we send some mixed frequencies at high frequency range 2 (21.2 kHz~22.0 kHz) as checksum. We did experiments about data transmission between smart devices by using the proposed method to confirm data transmission speed and accuracy of the proposed method. From the experiments, we showed that the proposed method could transmit 32 bits data in 235 ms, the transmission success rate was 99.47%, and error detection by using cyclic redundancy check was 0.53%. Therefore, the proposed method will be a useful for wireless transmission technology between smart devices.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.6A
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• pp.519-536
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• 2007

In this paper, we combine the Hybrid-Automatic Repeat reQuest (HARQ) algorithm with joint Tx and Rx antenna selection based on the reliability of the individual antennas links. The cyclic redundancy check (CRC) is applied on the data before being encoded using the Turbo encoder. In the receiver the CRC is used to detect errors of each antenna stream and to decide whether a retransmission is required or not. The receiver feeds back the transmitter with the Tx antennas ordering and the acknowledgement of each antenna (ACK or NACK). If the number of ACK antennas is higher than the NACK antennas, then the retransmission takes place from the ACK antennas using the Chase Combining (CC). If the number of the NACK antennas is higher than the ACK antennas then the ACK antennas are used to retransmit the data streams using the CC algorithm and additional NACK antennas are used to retransmit the remaining streams using Incremental Redundancy (IR, i.e. the encoder rate is reduced). Furthermore, the HARQ is used with the I-BLAST (Iterative-BLAST) which grantees a high transmission rate.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.993-997
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• 2004

A data error inspection algorithm for wireless digital data communication was developed. Original data converted By wireless digital data error inspection algorithm. Wireless digital data is high possibility to get distortion and lose by noise and barrier on wireless. If the data check damaged and lost at receiver, can't make it clear and can't judge whether this data is right or not. Therefore, by wireless transmission data need the data error inspection algorithm in order to decrease the data distortion and lose and to monitoring the transmission data as real time. This study consists of RF station for wireless transmission, Water Level Meter station for water level measurement and Error inspection algorithm for error check of transmission data. This study is also that investigation and search for error inspection algorithm in order to wireless digital data transmission in condition of the least data's damage and lose. Designed transmitter and receiver with one - chip micro process to protect to swell the volume of circuit. Had designed RF transmitter - receiver station simply by means of ATMEL one - chip micro processing the systems. Used 10mW of the best RF power and 448MHz-449MHz on frequency band which is open to public touse free within the limited power.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.11
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• pp.1655-1662
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• 1993

In this paper we discuss three algorithms-Direct, Successive, and Recursive-on parallel CRC(Cyclic Redundancy Check) verification. The algorithms are derived by combining the byte-syndromes precomputed from the generator polynomial. These algorithms are compared in terms of the amount of hardware and the speed of operation. Since the algorithms can be generalized easily, we took the ATM cell delineation example for easier description. As an application of the algorithm Recursive, an ATM cell delineation module suitable for STM-1 transmission has been successfully realized through commercially available field programmable gate arrays.

• Journal of Advanced Marine Engineering and Technology
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• v.25 no.2
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• pp.375-382
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• 2001

In this study, an adapted Turbo Coding Algorithm for reducing communication error of a fire detection system for marine vessels, especially image transmission via power lone. Because it is necessary that this system communicate larger and faster than previous method, this study carried out enhancement a decoding speed by adaptation CRC with Turbo Code Algorithm, improvement of metric method, and reduction of decoding delay by using of Center-to-Top method. And the results are as follows: (1) Confirmed that a Turbo Code is so useful methods for reducing communication error in lots of noise environments. (2)Proposed technology in this study speed increasing method of Turbo Coding Algorithm proves 2 times faster than normal Turbo Code and communication error reducing as well in the board made by VHDL software & chips ALTERA company.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.9C
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• pp.848-854
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• 2009

DVB-SSP is a new broadcasting system for hybrid satellite communications, which supports mobile handhold systems and fixed terrestrial systems. An upper layer, including erasure Reed-Solomon error correction combined with cyclic redundancy check. However, a critical factor must be considered in upper layer decoding. If there is only one bit error in an IP packet, the entire IP packet is considered as unreliable bytes, even if it contains correct bytes. If, for example, there is one real byte error, in an If packet of 512 bytes, 511 correct bytes are erased from the frame. Therefore, this paper proposed upper layer decoding methods; hybrid decoding. By means of simulation we show that the performance of the proposed decoding algorithm is superior to that of the conventional one in AWGN channel and TI channel.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.5
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• pp.20-28
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• 2014

This paper proposes a faulty node detection scheme that performs collective monitoring of a distributed networked control systems using interval weighting factor. The algorithm is designed to observe every node's behavior collectively based on the pseudo-random Bose-Chaudhuri-Hocquenghem (BCH) code. Each node sends a single BCH bit simultaneously as a replacement for the cyclic redundancy check (CRC) code. The fault judgement is performed by performing sequential check of observed detected error to guarantee detection accuracy. This scheme can be used for detecting and preventing serious damage caused by node failure. Simulation results show that the fault judgement based on decision pattern gives comprehensive summary of suspected faulty node.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.9
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• pp.1240-1248
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• 2013

This paper describes a switching-level operation analysis of BTB(Back-To-Back) converter for HVDC(high voltage DC) application based on MMC(modular multi-level converter). A switching-level operation analysis for BTB converter is very important to understand the converter operation in detail and check the voltage and current transients in each components. However, the development of switching-level simulation model for the actual size BTB Converter is very difficult because the MMC normally has more than 150 sub-modules for each arm. So, a switching level simulation model for the 11-level MMC-based BTB converter was developed with PSCAD/EMTDC software, which has 12 sub-modules for the positive arm and another 12 sub-modules for the negative arm. The DC-voltage balance algorithm, the circulating-current reduction algorithm, the harmonic reduction algorithm, and the redundancy operation algorithm were included in this simulation model. The developed simulation model can be utilized to analyze the MMC-based BTB converter for HVDC application in switching level and to develop the protection scheme for the MMC-based BTB converter for HVDC application.