• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.87-96
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• 2019

Low power issue is one of the most critical problems in the Internet of Things (IoT), which are powered by battery. To solve this problem, various approaches have been presented so far. In this paper, we propose a method to reduce the power consumption by reducing the numbers of accesses into the flash memory consuming a large amount of power for on-chip software execution. Our approach is based on using cooperative logging structure to distribute the sampling overhead in single sensor node to adjacent nodes in case of rare-event applications. The proposed algorithm to identify event occurrence is newly introduced with negative feedback method by observing difference between past data and recent data coming from the sensor. When an event with need of flash access is determined, the proposed approach only allows access to write the sampled data in flash memory. The proposed event detection algorithm (EDA) result in 30% reduction of power consumption compared to the conventional flash write scheme for all cases of event. The sampled data from the sensor is first traced into the random access memory (RAM), and write access to the flash memory is delayed until the page buffer of the on-chip flash memory controller in the micro controller unit (MCU) is full of the numbers of the traced data, thereby reducing the frequency of accessing flash memory. This technique additionally reduces power consumption by 40% compared to flash-write all data. By sharing the sampling information via LoRa channel, the overhead in sampling data is distributed, to reduce the sampling load on each node, so that the 66% reduction of total power consumption is achieved in several IoT edge nodes by removing the sampling operation of duplicated data.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.396-396
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• 2013

The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.6B
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• pp.948-953
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• 2010

In this paper, we propose multi-bit soft error detection method which can use an instruction cache of superscalar CPU architecture. Proposed method is applied to high-speed static RAM for instruction cache. Using 1D parity and interleaving, it has less memory overhead and detects more multi-bit errors comparing with other methods. It only detects occurrence of soft errors in static RAM. Error correction is treated like a cache miss situation. When soft errors are occurred, it is detected by 1D parity. Instruction cache just fetch the words from lower-level memory to correct errors. This method can detect multi-bit errors in maximum 4$\times$4 window.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1251-1254
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• 2003

In this paper, Experience Sensitive Cumulative Neural Network (ESCNN) is introduced, which can cumulate the same or similar experiences. As the same or similar training patterns are cumulated in the network, the system recognize more important information in the training patterns. The functions of forgetting less important informations and attending more important informations resided in the training patterns are surveyed and implemented by simulations. The system behaves well under the noisy circumstances due to its forgetting and/or attending properties, even in 50 percents noisy environments. This paper also describes the creation of the generalized patterns for the input training patterns.

• Journal of the Korean Society of Safety
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• v.10 no.3
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• pp.42-46
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• 1995

To purpose of this study is to model design and motion analysis of tangential cam mechanism using personal computer system. The CAD(Computer Aided Design) system used in this study was constructed with CPU(Central Processing Unit) 80486, RAM(Random Access Memory) 8M, CGA graphic card. By using developed program for tangential cam mechanism, we designed tangential cam models and analysed displacement, velocity, acceleration of follower.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.4
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• pp.274-282
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• 2016

This paper proposes code optimization techniques to reduce energy consumption of complex multimedia applications in a hybrid memory system with volatile dynamic random access memory (DRAM) and non-volatile spin-transfer torque magnetoresistive RAM (STT-MRAM). The proposed approach analyzes read/write operations for variables in an application. Based on the profile, variables with a high read operation are allocated to STT-MRAM, and variables with a high write operation are allocated to DRAM to reduce energy consumption. In this paper, to optimize code for real-life complicated applications, we develop a profiler, a code modifier, and compiler/link scripts. The proposed techniques are applied to a Fast Forward Motion Picture Experts Group (FFmpeg) application. The experiment reduces energy consumption by up to 22%.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.181.1-181.1
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• 2015

용액 공정을 이용한 Resistive random access memory (ReRAM)은 간단한 공정 과정, 대면적화, 저렴한 가격 등의 장점으로 인해 큰 관심을 받고 있으며, HfOx, TiOx, AlOx 등의 산화물이 ReRAM 절연 막으로 주로 연구되고 있다. 더 나아가 최근에는 organic 물질을 메모리 소자로 사용한 연구가 보고되고 있다. 이는 경제적이며, wearable 또는 flexible system에 적용이 용이하다. 그럼에도 불구하고, organic 물질을 갖는 메모리 소자는 기존의 산화물 소자에 비해 열에 취약하며 전기적인 특성과 신뢰성이 우수하지 못하다는 단점을 가지고 있다. 이를 위한 방안으로 본 연구에서는 AlOx - polymethylmethacrylate (PMMA) blended thin film ReRAM을 제안하였다. 이는 organic물질의 전기적 특성을 개선시킬 뿐 아니라, inorganic 물질을 wearable 소자에 적용했을 때 발생하는 crack과 같은 기계적 물리적 결함을 해결할 수 있는 새로운 방법이다. 먼저, P-type Si 위에 습식산화를 통하여 SiO2 300 nm 성장시킨 기판을 사용하여 electron beam evaporation으로 10 nm의 Ti, 100 nm의 Pt 층을 차례로 증착하였다. 그리고 PMMA 용액과 AlOx 용액을 초음파를 이용하여 혼합한 뒤, 이 용액을 Pt 하부 전극 상에서 spin coating방법으로 1000 rpm 10초, 5000 rpm 30초의 조건으로 증착하였다. Solvent 및 불순물 제거를 위하여 150, 180, $210^{\circ}C$의 온도로 30 분 동안 열처리를 진행하였고, shadow mask를 이용하여 상부 전극인 Ti를 sputtering 방식으로 100 nm 증착하였다. 150, 180, $210^{\circ}C$로 각각 열처리한 AlOx - PMMA blended ReRAM의 전기적 특성은 HP 4156B semiconductor parameter analyzer를 이용하여 측정하였다. 측정 결과 제작된 소자 전부에서 2 V이하의 낮은 동작전압, 안정된 DC endurance (>150cycles), 102 이상의 높은 on/off ratio를 확인하였고, 그 중 $180^{\circ}C$에서 열처리한 ReRAM은 더 높은 on/off ratio를 갖는 것을 확인하였다. 결론적으로 baking 온도를 최적화하였으며 AlOx - PMMA blended film ReRAM의 우수한 메모리 특성을 확인하였다. AlOx-PMMA blended film ReRAM은 organic과 inorganic의 장점을 갖는 wearable 및 system용 비휘발성 메모리소자에 적용이 가능한 경제적인 기술로 판단된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.306.2-306.2
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• 2014

전자기기의 휴대성과 이동성이 강조되고 있는 현대사회에서 비휘발성 메모리는 메모리 산업에 있어 매우 매력적인 동시에 커다란 잠재성을 지닌다. 이미 공정의 한계에 부딪힌 Flash 메모리를 대신하여 10nm 이하의 공정이 가능한 상변화 메모리(Phase-Change Memory, PRAM), 스핀 주입 자화 반전 메모리(Spin Transfer Torque-Magnetic RAM, STT-MRAM), 저항 변화 메모리(Resistive Random Access Memory, ReRAM)가 차세대 비휘발성 메모리 후보로서 거론되고 있으며, 그 중에서도 ReRAM은 빠른 속도와 낮은 소비 전력, CMOS 공정 호환성, 그리고 비교적 단순한 3차원 적층 구조의 특성으로 인해 활발히 연구되고 있다. 특히 최근에는 질화물 또는 질소를 도핑한 산화물을 저항변화 물질로 사용하는 ReRAM이 보고되고 있는데, 이들은 동작전압이 낮을 뿐만 아니라 저항 변화(Resistive Switching, RS) 과정에서 일어나는 계면 산화를 방지할 수 있으므로 ReRAM의 저항 변화 재료로서 각광받고 있다. 그러나 Cell 단위의 ReRAM 소자를 Crossbar Array 구조에 적용시켰을 때 주변 Cell과의 저항 상태 차이로 인해 전류가 낮은 저항 상태(LRS)의 Cell로 흘러 의도치 않은 동작을 야기한다. 이와 같이 누설 전류(Leakage Current)로 인한 상호간의 간섭이 일어나는 Cross-talk 현상이 존재하며, 공정의 간소화와 집적도를 유지하면서 이 문제를 해결하는 것은 실용화하기에 앞서 매우 중요한 문제이다. 따라서, 본 논문에서는 Read 동작 시 발생하는 Cell과 Cell 사이의 Cross-talk 문제를 해결하기 위해 자가 정류 특성(Self-Rectifying)을 가지는 실리콘 질화물/알루미늄 질화물 이중층(Si3N4/AlN Bi-layer)으로 구성된 ReRAM 소자 구조를 제안하였으며, Sputtering 방법을 이용하여 제안된 소자를 제작하였다. 전압-전류 특성 실험결과, 제안된 구조에 대한 에너지 밴드 다이어그램 시뮬레이션 결과와 동일하게 Positive Bias 영역에서 자가 정류 특성을 획득하였고, 결과적으로 Read 동작 시 발생하는 Cross-talk 현상을 차단할 수 있는 결과를 확보하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.373-373
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• 2014

Resistive-change random access memory (ReRAM) device is one of the promising candidates owing to its simple structure, high scalability potential and low power operation. Many resistive switching devices using transition metal oxides materials such as NiO, Al2O3, ZnO, HfO2, $TiO_2$, have attracting increased attention in recent years as the next-generation nonvolatile memory. Among various transition metal oxides materials, HfO2 has been adopted as the gate dielectric in advanced Si devices. For this reason, it is advantageous to develop an HfO2-based ReRAM devices to leverage its compatibility with Si. However, the annealing temperature of these high-k thin films for a suitable resistive memory switching is high, so there are several reports for low temperature process including microwave irradiation. In this paper, we demonstrate the bipolar resistive switching characteristics in the microwave irradiation annealing processed Ag/HfO2/Pt ReRAM device. Compared to the as-deposited Ag/HfO2/Pt device, highly improved uniformity of resistance values and operating voltage were obtained from the micro wave annealing processed HfO2 ReRAM device. In addition, a stable DC endurance (>100 cycles) and a high data retention (>104 sec) were achieved.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.2
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• pp.81-84
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• 2014

The bipolar resistive switching characteristics of resistive random access memory (ReRAM) based on $HfO_2$ thin films have been demonstrated by using Ag/$HfO_2$/Pt structured ReRAM device. MIcrowave irradiation (MWI) treatment at low temperature was employed in device fabrication with $HfO_2$ thin films as a transition layer. Compared to the as-deposited Ag/$HfO_2$/Pt device, highly improved uniformity characteristics of resistance values and operating voltages were obtained from the MWI treatment Ag/$HfO_2$/Pt ReRAM device. In addition, a stable DC endurance (> 100 cycles) and a high data retention (> $10^4$ sec) were achieved.