• Journal of electromagnetic engineering and science
• /
• v.8 no.3
• /
• pp.114-118
• /
• 2008

Direct-conversion RF front-end for 5-GHz WLAN is implemented in $0.18-{\mu}m$ CMOS technology. The front-end consists of a low noise amplifier, and low flicker noise down-conversion mixers. For the mixer, an inductor is included to resonate out parasitic tail capacitances in the transconductance stage at the operating frequency, thereby improves the flicker noise performance of the mixer, and the overall noise performance of the front-end. The receiver RF front-end has 6.5 dB noise figure, - 13 dBm input IP3, and voltage conversion gain of 20 dB with the power consumption of 30 mW.

• Proceedings of the IEEK Conference
• /
• 2000.11b
• /
• pp.104-107
• /
• 2000

We designed and implemented the RFIC(RF front-end IC) for DTV(Digital TV) tuner. The DTV tuner RF front-end consists of low noise IF amplifier fur the amplification of 900 MHz RF signal and down conversion mixer for the RF signal to 44MHz IF conversion. The RFIC is implemented on ETRI 0.8u high resistive (2㎘ -cm) and evaluated by on wafer, packaged chip test. The gain and IIP3 of IF amplifier are 15㏈ and -6.6㏈m respectively. For the down conversion mixer gain and IIP3 are 13㏈ and -6.5㏈m. Operating voltage of the IF amplifier and the down mixer is 5V, current consumption are 13㎃ and 26㎃ respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.42 no.6 s.336
• /
• pp.1-8
• /
• 2005

This paper presents a new low-cost fault-based Built-In Self-Test (BIST) scheme and technique for 1.8GHz RF receiver front end. The technique utilizes input impedance matching measurement. The BIST block and RF receiver front end are designed using 0.25m CMOS technology on a single chip. The technique is simple and inexpensive. The overhead of the BIST circuit is approximately $10\%$ of the total area of the RF front end.

• 한국ITS학회:학술대회논문집
• /
• 2008.11a
• /
• pp.380-382
• /
• 2008

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.402-403
• /
• 2011

This paper has proposed a $0.13-{\mu}m$ CMOS RF Front-end transmitter for LTE-Advanced systems. The proposed RF Front-end supports a band 7 (from 2500 MHz to 2570 MHz) in E-UTRA of 3GPP. It can provide a maximum output power level of +10 dBm but it's a normal output power level is +0 dBm considering a low PAPR. The post-layout simulation results show that the quadrature up-conversion mixer and a driver amplifier consumes 14 mA and 28 mA from a 1.2 V supply voltage respectively, while providing a output power level of 0 dBm at the input power level of -13 dBm.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.12
• /
• pp.2286-2292
• /
• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.242-246
• /
• 2012

This paper presents an integrated low noise and highly linear wideband RF front-end for a digital terrestrial and cable TV tuner, which are used as a part of double-conversion TV tuner. The low noise amplifier (LNA) has a low noise figure and high linearity by adopting a noise canceling technique based on current amplification. The up-conversion mixer and SAW buffer have high linearity by employing a third order intermodulation cancellation technique. The proposed RF front-end is designed in a $0.18{\mu}m$ CMOS and draws 60 mA from a 1.8 V supply voltage. The RF front-end shows a voltage gain of 30 dB, an average single side-band noise figure of 4.2 dB, an IIP2 of 40 dBm, and an IIP3 of -4.5 dBm for the entire band from 48 MHz to 862Hz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.23 no.8
• /
• pp.958-966
• /
• 2012

This paper presents a compact bluetooth/WiFi dual-mode dual-band RF front-end module(FEM) is realized by low temperature co-fired ceramic(LTCC) technology. The proposed RF front-end module consists of a diplexer, baluns in the LTCC substrate, and an SPDT switch, an SP3T switch on the LTCC substrate. In order to reduce the module size and increase integration level, the proposed diplexer and balun are designed using LC lumped elements. The parasitic elements caused by coupling effect between metal pattern layers and ground plane layer are considered during the design. The fabricated dual-mode RF front-end module has 13 pattern layers including three inner ground layers and it occupies less than $3.0mm{\times}3.7mm{\times}0.66mm$.

• Journal of Positioning, Navigation, and Timing
• /
• v.6 no.1
• /
• pp.1-8
• /
• 2017

In this study, to design a multi-GNSS receiver using single RF front-end, the receiving performances for various frequency plans were evaluated. For the fair evaluation and comparison of different frequency plans, the same signal needs to be received at the same time. For this purpose, two synchronized RF front-ends were configured using USRP X310, and PC-based software was implemented so that the quality of the digital IF signal received at each front-end could be evaluated. The software consisted of USRP control, signal reception, signal acquisition, signal tracking, and C/N0 estimation function. Using the implemented software and USRP-based hardware, the signal receiving performances for various frequency plans, such as the signal attenuation status, overlapping of different systems, and the use of imaginary or real signal, were evaluated based on the C/N0 value. The results of the receiving performance measurement for the various frequency plans suggested in this study would be useful reference data for the design of a multi-GNSS receiver in the future.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.8
• /
• pp.1805-1812
• /
• 2011

Bandpass sampling technique has an advantage that it uses lower sampling frequency than Nyquist criterion. But special care is required in choosing sampling frequency to avoid self-image overlapping in the first Nyquist region. Recently, the second-order BPS techniques which can suppress possible self-image by using an additional ADC and by employing digital signal processing have been proposed. This paper addresses a complex BPS based SDR front-end. Unlike general second-order BPS, it needs simple FIR filter to compensate delay in the second ADC. We show a method to find proper sampling frequencies to down convert RF signals selected by tunable RF filter operating in arbitrary frequency range.