• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.11a
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• pp.23-27
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• 2000

Simultaneous Switching Noise (SSN) propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs) causes malfunction of both digital and analog circuits. To reduce SSN, decoupling capacitors are generally used in the PCBs. In this paper, we improve the equivalent circuit model of decoupling capacitor in high-frequency range to analyze the effect of SSN reduction accurately. The analysis is performed by the microwave and RF design system (MDS) method and the finite difference time domain (FDTD) method. We compared the results by the ideal capacitor model with those by the proposed model.

• Journal of information and communication convergence engineering
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• v.16 no.4
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• pp.203-212
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• 2018

In this article, a novel design of patch antenna with wide band characteristics is presented. The proposed antenna is having electrical dimensions of $0.14{\lambda}{\times}0.11{\lambda}$ (at lower initial frequency) and footprints of $150mm^2$. Structural parameters optimization shows 3.1-23.5 GHz frequency range for a (reflection coefficient) $S_{11}{\leq}-10dB$ and simulated gain 6.8 dB is obtained. An equivalent circuit model is proposed to get an insight view of antenna. Advanced Systems Design (ADS) simulation results are obtain which confirm the validity of proposed model. Degenerated foster canonical form has been used to explain the reactance and capacitive behavior idea of simulated proposed antenna's input impedance later on an equivalent circuit model and smith chart is also suggested. HFSS and CST have been used to analyze antenna behavior. The proposed antenna can be further used for microwave image detection applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.4
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• pp.895-899
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• 2000

A method of measuring Q of a two port cavity by scattering parameters is proposed. The scattering parameters of a two port cavity resonator are derived by a lumped equivalent circuit model as a function of cavity parameters, including the cavity Q. These can be also obtained by direct measurement with a modern network analyzer, The results show good agreement with those from other well-known methods. This two port measurement can provide additional information such as the coupled power ratio, which is one of the important parameters for the beam accelerating cavities.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.25-31
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• 2016

Parasitic capacitance and resistance of FinFET transistors are the important components that determine the frequency performance of the circuit. Therefore, the researchers in our group developed more accurate parasitic capacitance and resistance for FinFETs than BSIM-CMG. To verify the RF performance, proposed model was applied to design an LNA that has $S_{21}$ more than 10dB and center frequency more than 60GHz using HSPICE. To verify the accuracy of the proposed model, mixed-mode capability of 3D TCAD simulator Sentaurus was used. $S_{21}$ of LNA was chosen as a reference to estimate the error. $S_{21}$ of proposed model showed 87.5% accuracy compared to that of Sentaurus in 10GHz~100GHz frequency range. The $S_{21}$ accuracy of BSIM-CMG model was 56.5%, so by using the proposed model, the accuracy of the circuit simulator improved by 31%. This results validates the accuracy of the proposed model in RF domain and show that the accuracies of the parasitic capacitance and resistance are critical in accurately predicting the LNA performance.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.796-800
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• 2004

The main research on this paper is to model on-chip inductor in digital CMOS technology by using the foundry parameters and the physical structure. The s-parameters of a spiral inductor are extracted from the modeled equivalent circuit and then compared to the results obtained from HFSS. The structure and material of the inductor used for modeling in this work is identical with those of the inductor fabricated by CMOS process. To show why the modeled inductor instead of ideal inductor should be used to design a RF system, we designed dual band RF front-end receiver and then compared the results between when using the ideal inductor and using the modeled inductor.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.54-61
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• 1997

An accurate extraction technique is developed to determine full euqivalent circuit parameters of Si MOSFETs using 1 set of measured S-parametes without complicated optimization process. This technique is based on the use of anlytic Z-parameters experessions for resistances and inductances and the Y-parameter ones for ntrinsic parameters. This accuracy is proved over the wide range of gate voltage by observing good agreement between measured and fitted Z-parameter equations and frequency-independent response of the extracted intrinsic parameters. Using this technique, gate voltage-dependencies of model parameters are obained in the saturation region and these results show the similar behavior to the short-channel effects expected from the device theory.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.208-213
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• 2003

In this paper, we have designed the duplexer using non-radiative dielectric (NRD) guide in millimeter band. The designed duplexer is composed of two stepped-impedance filters and T-junction. Stepped-impedance filters are designed with an equivalent circuit model of evanescent waveguide and the T-junction is optimized to minimize return loss. The characteristics of duplexer shows a good agreement with the expected results.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.341-344
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• 2000

Several new via structures in printed circuit boards are proposed, fabricated and characterized in RF regime. The new structure with a larger inductance component in the bottom layer shows 3㏈ improvement over the conventional structure. The ADS simulation with model parameters extracted from 3D fie]d solver matches with the characterization of these vias

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2300-2302
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• 2005

Metal-Semiconductor-Metal type photodetector was fabricated with AlGaAs/InGaAs Quantum Well FET structures using simplified processing steps. The DC and RF responses were measured by 850nm wavelength injection laser. A DC responsivity in the quasisaturated regime was 0.45 A/W in CW measurements, and a bandwidth measured using a 850nm 40 ps pulsed laser was 16GHz. An electrical equivalent circuit model was extracted from measured S-parameter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.525-536
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• 2014

Recently, the first generation of mass production of FinFET-based microprocessors has begun, and scaling of FinFET transistors is ongoing. Traditional capacitance and resistance models cannot be applied to nonplanar-gate transistors like FinFETs. Although scaling of nanoscale FinFETs may alleviate electrostatic limitations, parasitic capacitances and resistances increase owing to the increasing proximity of the source/drain (S/D) region and metal contact. In this paper, we develop analytical models of parasitic components of FinFETs that employ the raised source/drain structure and metal contact. The accuracy of the proposed model is verified with the results of a 3-D field solver, Raphael. We also investigate the effects of layout changes on the parasitic components and the current-gain cutoff frequency ($f_T$). The optimal FinFET layout design for RF performance is predicted using the proposed analytical models. The proposed analytical model can be implemented as a compact model for accurate circuit simulations.