Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.11b
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- Pages.341-344
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- 2000
Implementation of the Optimized Via Structure on the Multi-Layered PCB
다층 인쇄회로 기판 (multi-layered PCB)에서의 최적 via 구조의 구현
Abstract
Several new via structures in printed circuit boards are proposed, fabricated and characterized in RF regime. The new structure with a larger inductance component in the bottom layer shows 3㏈ improvement over the conventional structure. The ADS simulation with model parameters extracted from 3D fie]d solver matches with the characterization of these vias
Keywords