Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Study on I/O Buffer Modeling to Supply PCB Simulation

PCB시뮬레이션을 지원하기 위한 입출력 버퍼 모델링에 관한 연구

  • 김현호 (도립충북과학대학 전자과) ;
  • 이용희 (청주대학교 전자공학과) ;
  • 이천희 (청주대학교 전자공학과)
  • Published : 2000.11.01
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Abstract

In this paper, We described the procedures to generate an input-output buffer information specification (IBIS) model in digital IC circuits. We gives the method to describe IBIS standard I/O for the characteristics of I/O buffer and to represent its electrical characteristics. The parameters of I/O structure for I/O buffer modelling are also referred, and an IBIS model for CMOS, TTL IC, ROM and RAM constructed amounts about 216. This IBIS model can be used to the simulation of signal integrity of high speed circuits in a PCB level.

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