• 대한전자공학회논문지SD
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• 제48권2호
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• pp.67-72
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• 2011

삼중대역(2.3/2.5/3.5GHz) m-WiMAX 시스템의 제작을 위한 8층의 인쇄회로기판을 제작하였다. 고주파 동작시에도 우수한 성능을 확보하기 위하여 저유전율을 사용한 인쇄회로기판을 제작하였다. 또한 시스템 전체의 크기를 축소하기 위하여 수동소자를 삽입시킨 임베디드 인쇄회로기판을 제작하였다. 그 결과 시스템 면적의 9%를 줄일 수 있었다. 제작된 인쇄회로기판을 사용하여 삼중대역 m-WiMAX 시스템이 제작되었으며, 인터넷 연결 테스트를 성공적으로 수행하였다. 개발된 임베디드 인쇄회로기판은 시스템의 면적 축소와 저신호 손실 RF 통신 시스템에 효과적인 대응을 가능하게 할 것이다.

• ETRI Journal
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• 제32권4호
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• pp.503-511
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• 2010

WiBro radio frequency (RF) repeater is used for solving the problem of partial shadow areas in the wireless communication field that uses time-division duplexing (TDD) mode. In this paper, a method to efficiently generate TDD signals for WiBro RF repeater is proposed and its digital circuit is implemented. A TDD signal is detected from RF signals transmitted/received to/from RF repeater and then inputted again into the RF repeater, so that it can operate normally. First, the envelope of downlink signals is detected and then clamped to extract the basic form of a TDD signal using an operational amplifier circuit. Next, the TDD signal is generated by restoring and filtering the shape which has been distorted by the wireless channel. The algorithm and system to acquire TDD signal are developed with a goal to have simple but powerful functions with as little cost as possible. The proposed method is implemented as an RF-digital integrated system and verified through the experiments under the same condition as actual WiBro service environment.

• ETRI Journal
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• 제28권3호
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• pp.355-363
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• 2006

This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

• 한국전기전자재료학회논문지
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• 제15권6호
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• pp.492-498
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2 mm$(0.11 [cc]).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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• pp.653-656
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2$ mm(0.11[cc]).

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 춘계종합학술대회
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• pp.288-292
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• 2002

RF 회로에 적합한 새로운 형태의 on-chip ESD protection 방법을 제시하였다. RF 회로의 특성을 이용하여 DC blocking capacitor 앞에 short-circuited stub를 달아서 ESD 소자로 활용하였다. 특히 short-circuited stub를 매칭 회로의 일부로 사용하여 stub의 길이를 줄일 수 있다. 또한 short-circuited stub의 width와 metal의 성분으로 ESD threshold voltage를 쉽게 예측 가능하다. 기존의 ESD 방지 회로와 달리 RF 회로를 위한 ESD 방지 회로에서 문제시되던 기생 capacitance 성분에 대한 문제점을 해결 할 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.540-543
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• 2003

This paper presents design and manufacture of RF type non-contact radiological dosage measuring device. It also concerns on the broad out-line and the ways of improvement about RF type non-contact radiation measuring device. Measuring radiological dosage with non-contact RF, the stability and efficiency of the measure have been improved by reforming constant current circuit. Furthermore, applying communication protocol in process makes it possible to achieve faster and more accurate communication than old circuit. On the base of those, RF type non-contact radiological dosage measuring device which consists of radiological dosage measuring module and Reader module has been designed and manufactured. While testing communication against embodied device, the possibility of the field application could be confirmed.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 춘계종합학술대회
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• pp.995-998
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• 2005

본 논문에서는 시스템 온 칩 (SoC, System-on-Chip) 트랜시버에 적용이 가능하며. 저잡음 증폭기(LNA, Low Noise Amplifier)를 위한 자동 보상 회로 (ACC, automatic compensation circuit)를 제안한다. 개발된 회로는 고주파 내부 자체 검사 (BIST, Built-In Self-Test) 회로, 커패시터 미러 뱅크 (CMB, Capacitor Mirror Banks)와 디지털 처리장치로 구성되어 있다. 자동 보상 회로는 LNA가 정상 동작을 하지 않을 때 SoC 트랜시버의 구성요소인 디지털 프로세서를 이용하여 LNA가 정상 동작을 하도록 자동적으로 조정하는 역할을 한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -2
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• pp.1119-1122
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• 2000

This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.710-713
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• 2004

The design, simulation, modeling and measurement of a low temperature co-fired ceramic (LTCC) RF switch module for GSM applications is presented in this paper. RF switch module is constructed using a Rx/Tx switching circuit and integrated low pass filter. The low pass filter function was designed to operate in th GSM band. Insertion and return loss of the low pass filter were designed less than 0.3 dB and better than 12.7 dB at 900 MHz. The RF switch module contained 10 embedded passives and 3 surface mount components integrated on $4.6{\times}4.8{\times}1.2$ nm, 6-layer multi-layer integrated circuit. The insertion loss of switch module was measured at 900 MHz was 11 dB.