• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.6
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• pp.1058-1063
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• 2010

In this paper, we designed self-frequency synchronizing circuit using image rejection mixer(IRM) and single-sideband(SSB) up-converter which can effectively eliminate the image frequencies occurred in multi-channel super-heterodyne receivers and help us to match inter-channel phase. Also the self-frequency synchronizing circuit simplifies system because there need no extra devices for making intermediate frequency(IF) by creating the local signal within several nanoseconds by means of generating the same frequency of IF signal and modulating radio frequency(RF) signal. We adopt the limiting amplifier for the purpose of protecting the circuit from spurious signals which come from the front end side having wide instantaneous bandwidth characteristics and constantly injecting same level into the input local signal of IRM. The IRM we fabricated has image rejection ratio of 27dB, which is good over 7dB for foreign company's. Also, the SSB up-converter we fabricated has 1dB compression point of 18dBm, which is good over 16dB for foreign company's. And the size is compact about one-forth.

• Journal of Electrical Engineering and Technology
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• v.7 no.1
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• pp.81-85
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• 2012

This paper presents a wideband and low-noise direct conversion front-end receiver supporting VHF and UHFbands simultaneously. The receiver iscomposed of a low-noise amplifier (LNA), a down conversion quadrature mixer, and a frequency divider by 2. The cascode configuration with the resistor feedback is exploited in the LNA to achieve a wide operating bandwidth. Four gainstep modesare employed using a switched resistor bank and a capacitor bank in the signal path to cope with wide dynamic input power range. The verticalbipolar junction transistors are used as the switching elements in the mixer to reduce 1/f noise corner frequency. The proposed front-end receiver fabricated in 0.18 ${\mu}m$ CMOS technology shows very low minimum noise figureof 1.8 dB and third order input intercept pointof -12dBm inthe high-gain mode of 26.5 dBmeasured at 500 MHz.The proposed receiverconsumeslow current of 20 mA from a 1.8 V power supply.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1009-1012
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• 2000

In this paper, we have designed and fabricated power PHEMT’s with an unit gate width of 80$\mu\textrm{m}$ and 4 fingers, and MIMIC power amplifiers using the PHEMT’s as well. The PHEMT’s have a 0.2$\mu\textrm{m}$ gate length and source to drain spacing of 3$\mu\textrm{m}$. The characteristics of the fabricated PHEMT’s are 4.08dB of S$\sub$21/ gain at the 35GHz and 317mS/mm of gm, and 62GHz of f$\sub$T/ and 120GHz of f$\sub$max/. The designed and fabricated MIMIC’s power amplifiers with 6 PHEMT’s and MIN capacitors were fully passivated by 1000 Α of Si$_3$N$_4$ film for higher performance and surface protects. The chips were processed using the MINT processes, and size was 3.25 ${\times}$ 1.8$\textrm{mm}^2$. The fabricated MIMIC power amplifiers have RF characteristics such as 11.25dB of S$\sub$21/ gain, 11.37dB of input return-loss and 12.69dB of output return-loss at the 34.55GHz.

• Journal of IKEEE
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• v.17 no.2
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• pp.176-181
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• 2013

This paper presents a CMOS impulse radio ultra-wideband (IR-UWB) receiver implemented using IBM 0.13um CMOS technology for inner/inter-chip wireless interconnection. The IR-UWB receiver is based on the non-coherent architecture which removes the complexity of RF architecture (such as DLL or PLL) and reduces power consumption. The receiver consists of three blocks: a low noise amplifier (LNA) with active balun, a correlator, and a comparator. Simulation results show the die area of the IR-UWB receiver of 0.2mm2, a power gain (S21) of 12.5dB, a noise figure (NF) of 3.05dB, an input return loss (S11) of less than -16.5dB, a conversion gain of 18dB, a NFDSB of 22. The receiver exhibits a third order intercept point (IIP3) of -1.3dBm and consumes 22.9mW of power on the 1.4V power supply.

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.61-64
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• 2017

A phase shifter is one of the key components that change the phase of an individual antenna in millimeter-wave phased array system. This paper presents a low-loss phase shifter design with two parallel 2-state amplifiers. To get the same gain of $0^{\circ}/180^{\circ}$ each state, delay lines are in the middle of each stage of the 2-Stage amplifiers. Normally, when adding AMPs in parallel, a power combiner/divider such as Wilkinson Power Combiner/Divider is added, but they are directly connected because it can cause added losses in silicon wafer. The measured data shows 12dB gain and 174-degree phase difference at 5GHz.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.2
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• pp.228-231
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• 2013

This paper proposes a new method that reduces RCS(rader cross section) of the aluminum plate using a oscillation system composed of a VGA(variable gain amplifier) and a phase shifter. Once the oscillation system receives the external-RF signal through a probe on aluminum plate, it makes an amplified signal with a specific phase to cancel the signal reflected from the aluminum plate. The signal transmitted from the oscillation system has the same amplitude and out of phase with the reflected signal. And it can be controlled by the VGA and the phase shifter in the oscillation system. In order to validate the performance of the proposed oscillation system, FEM simulator was used and we measured how much an amplitude of the signal reflected from the aluminum plate rotated in phi direction is reduced in an anechoic chamber.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.187-187
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• 2007

This paper presents the electrical properties of SiGe HBTs designed with bottom collector and single metal layer structure for RF power amplifier. Base layer was formed with graded-SiGe/Si structures and the collector place to the bottom of the device. Bottom collector and single metal layer structures could significantly simplify the fabrication process. We studied about the influence of SiGe base thickness, number of emitter fingers and temperature dependence (< $200^{\circ}C$) on electrical properties. The feasible application in 1~2GHz frequency from measured data $BV_{CEO}$ ~10V, $f_r$~14 GHz, ${\beta\simeq}110$, NF~1 dB using packaged SiGe HBTs. We will discuss the temperature dependent current flow through the e-b, b-c junctions to understand stability and performance of the device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1055-1063
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• 2013

Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.12
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• pp.1350-1359
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• 2008

This paper presents a wideband doubly balanced resistive mixer fabricated using $0.5{\mu}m$ GaAs p-HEMT process. Three baluns are employed in the mixer. LO and RF baluns operating over an 8 to 20 GHz range were implemented with Marchand baluns. In order to reduce chip size, the Marchand baluns were realized by the meandering multicoupled line and inductor lines were inserted to compensate for the meandering effect. IF balun was implemented through a DC-coupled differential amplifier. The size of IF balun is $0.3{\times}0.5\;mm^2$ and the measured amplitude and phase unbalances were less than 1 dB and $5^{\circ}$, respectively from DC to 7 GHz. The mixer is $1.7{\times}1.8\;mm^2$ in size, has a conversion loss of 5 to 11 dB, and an output third order intercept(OIP3) of +10 to +15 dBm at 16 dBm LO power for the operating bandwidth.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.10
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• pp.185-190
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• 2007

In this paper, minimum sampling rates and method of nonlinear characterization were suggested for low power, quasi-memoryless PAs. So far, the Nyquist rate of the input signal has been used for nonlinear PA modeling, and it is burdening Analog-to-digital converters for wideband signals. This paper shows that the input Nyquist rate sampling is not a necessary condition for successful modeling of quasi-memoryless PAs. Since this sampling requirement relives the bandwidth requirements for Analog-to-digital converters (ADCs) for feedback paths in digital pre-distortion systems, relatively low-cost ADcs can be used to identify nonlinear PAs for wideband signal transmission, even at severe aliasing conditions. Simulation results show that a generic memoryless nonlinear RF power amplifier with AMAM and AMPM distortion can be successfully identified at any sampling rates. Measurement results show the modeling error variation is less than 0.8dB over any sampling rates.