• JSTS:Journal of Semiconductor Technology and Science
• /
• v.5 no.3
• /
• pp.159-167
• /
• 2005

Quantization effects (QEs), which manifests when the device dimensions are comparable to the de Brogile wavelength, are becoming common physical phenomena in the present micro-/nanometer technology era. While most novel devices take advantage of QEs to achieve fast switching speed, miniature size and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. In this paper, an analytical model accounting for the QEs and poly-depletion effects (PDEs) at the silicon (Si)/dielectric interface describing the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of MOS devices with thin oxides is developed. It is also applicable to multi-layer gate-stack structures, since a general procedure is used for calculating the quantum inversion charge density. Using this inversion charge density, device characteristics are obtained. Also solutions for C-V can be quickly obtained without computational burden of solving over a physical grid. We conclude with comparison of the results obtained with our model and those obtained by self-consistent solution of the $Schr{\ddot{o}}dinger$ and Poisson equations and simulations reported previously in the literature. A good agreement was observed between them.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.11
• /
• pp.1-8
• /
• 1990

We made a 12-Laser Diode Array consisting of 12 Graded Index Separate Confinement (GRINSCH) InGaAs/Inp Buried Heterostructure 4 Quantum Well Laser Diodes and examined the potential of controlling lasing operation of each laser diode by the voltage to its electroabsorption region. Using Si V-Groove with 12 V-grooves, a 12-Laser Diode Array, and 12 optical fibers, we investigated the various characteristics of each laser diode by changing the voltage to its electro-absorption region. Finally, we thought over the promising way of implementing optical local area communication between electric circuit boards or between subscribers and a central office using a 12-Laser Diode Array, Si V-groove, and optical fibers.

• Journal of IKEEE
• /
• v.23 no.3
• /
• pp.811-816
• /
• 2019

The silicon-adsorbed oxygen(Si-O) superlattice grown by ultra high vacuum-chemical vapor deposition(UHV-CVD) was introduced as an epitaxial barrier for silicon quantum electron devices. The current-voltage (I-V) measurement results show the stable and good insulating behavior with high breakdown voltage. It is apparent that the Si-O superlattice can serve as an epitaxially grown insulating layer as possible replacement of silicon-on-insulator(SOI). This thick barrier may be useful as an epitaxial insulating gate for field effect transistors(FETs). The rationale is that it should be possible to fabricate a FET on top of another FET, moving one step closer to the ultimate goal of future silicon-based three-dimensional integrated circuit(3DIC).

• Journal of Sensor Science and Technology
• /
• v.30 no.6
• /
• pp.441-445
• /
• 2021

The components affecting the extrinsic transconductance (g_{m_ext}) in In_0.7Ga_0.3As quantum-well (QW) high-electron-mobility transistors (HEMTs) on an InP substrate were investigated. First, comprehensive modeling, which only requires physical parameters, was used to explain both the intrinsic transconductance (g_{m_int}) and the g_{m_ext} of the devices. Two types of In_0.7Ga_0.3As QW HEMT were fabricated with gate lengths ranging from 10 ㎛ to sub-100 nm. These measured results were correlated with the modeling to describe the device behavior using analytical expressions. To study the effects of the components affecting g_{m_int}, the proposed approach was extended to projection by changing the values of physical parameters, such as series resistances (R_S and R_D), apparent mobility (𝜇_{n_app}), and saturation velocity (𝜈_sat).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.3
• /
• pp.479-485
• /
• 2006

The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.3
• /
• pp.189-198
• /
• 2006

A new analytical model has been proposed for predicting the sheet carrier density of Metal insulator Semiconductor High Electron Mobility Transistor (MISHEMT). The model takes into account the non-linear relationship between sheet carrier density and quasi Fermi energy level to consider the quantum effects and to validate it from subthreshold region to high conduction region. Then model has been formulated in such a way that it is applicable to MESFET/HEMT/MISFET with few adjustable parameters. The model can also be used to evaluate the characteristics for different gate insulator geometries like T-gate etc. The model has been extended to forecast the drain current, conductance and high frequency performance. The results so obtained from the analysis show excellent agreement with previous models and simulated results that proves the validity of our model.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.3
• /
• pp.196-208
• /
• 2007

An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.

• ETRI Journal
• /
• v.15 no.2
• /
• pp.11-25
• /
• 1993

Interface trap densities at gate oxide/silicon substrate ($SiO_2/Si$) interfaces of metal oxide semiconductor field-effect transistors (MOSFETs) were determined from the substrate bias dependence of the subthreshold slope measurement. This method enables the characterization of interface traps residing in the energy level between the midgap and that corresponding to the strong inversion of small size MOSFET. In consequence of the high accuracy of this method, the energy dependence of the interface trap density can be accurately determined. The application of this technique to a MOSFET showed good agreement with the result obtained through the high-frequency/quasi-static capacitance-voltage (C-V) technique for a MOS capacitor. Furthermore, the effective substrate dopant concentration obtained through this technique also showed good agreement with the result obtained through the body effect measurement.

• Transactions on Electrical and Electronic Materials
• /
• v.17 no.5
• /
• pp.270-274
• /
• 2016

This article investigates the use of the Gaussian-channel doping profile for the control of the short-channel effects in the double-gate MOSFET whereby a two-dimensional (2D) quantum simulation was used. The simulations were completed through a self-consistent solving of the 2D Poisson equation and the Schrodinger equation within the non-equilibrium Green’s function (NEGF) formalism. The impacts of the p-type-channel Gaussian-doping profile parameters such as the peak doping concentration and the straggle parameter were studied in terms of the drain current, on-current, off-current, sub-threshold swing (SS), and drain-induced barrier lowering (DIBL). The simulation results show that the short-channel effects were improved in correspondence with incremental changes of the straggle parameter and the peak doping concentration.

• Progress in Superconductivity
• /
• v.9 no.2
• /
• pp.136-139
• /
• 2008

InAs semiconductor nanowires can provide a promising platform to integrate superconducting quantum circuit, which exploits tunable supercurrent under the operation of gate voltage. We report temperature and magnetic field dependence of the nanowire superconducting junctions, which is in agreement with the proximity-effect theory of superconductor-normal metal-superconductor weak link. Superconducting coherence length of the InAs nanowire is estimated from the fit and magnetic-field dependence of the critical current and the subgap structure of dI/dV is discussed as well.