• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.493-500
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• 2015

A flyback converter operates with either pulse width modulation (PWM) or pulse frequency modulation (PFM) control scheme depending on the load current. At light load condition, PFM control is employed to reduce the switching frequency and thereby minimize the switching power loss. For heavier load, PWM control is used to regulate the output voltage of the flyback converter. The flyback controller has been implemented in a $0.35{\mu}m$ BCDMOS process and applied to a 40-W flyback converter. The light-load power efficiency of the flyback converter is improved up to 5.7-% comparing with the one operating with a fixed switching frequency.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.3
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• pp.133-139
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• 2003

In this paper, a new control scheme of Class-E inverter for Induction Heating (IH) Jar applications with clamped voltage characteristics using Pulse-Frequency-Modulation (PFM) is introduced. To reduce the voltage stress of switch, the proposed PFM control scheme doesn't need any auxiliary circuit in comparison to a family of Active Clamped Class-E (ACCE) inverter. It can decrease voltage stress of switch through modulation of switching frequency. The Class-E inverter using the proposed control scheme has the advantage of not only the same output power when it is compared with a Hybrid-Active Clamped Class-E (Hybrid-ACCE) inverter but also Zero-Voltage-Switching (ZVS), which are characteristics of conventional Class-E and ACCE inverter. The control principles and analysis of proposed method are explained in detail and its validity is verified through simulation and experimental results.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.1
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• pp.53-60
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• 2001

In many applications of power electronics, high frequency resonant inverters are used, and the PAM(Pulse Amplitude Modulation), PFM(Pulse Frequency Modulation) or PWM(Pulse Width Modulation) techniques are used to control the output power of resonant inverters. And the resonant inverters have to control the output frequency for the reliable operation under the variable load conditions. In this paper, a new switching scheme is proposed as a PWM control of resonant inverters. With the proposed method, it can be obtained that optimum resonant frequency and unity output displacement factor under the variable resonant frequency adaptively. The detail algorithm or the proposed PWM switching scheme and its output characteristics are discussed. And the veridity of the proposed method is confirmed with the experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.3
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• pp.291-299
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• 2000

형광등의 수명은 형광등 안정기의 시동 시나리오와 형광등 전류의 파고율에 영향을 받는다. 본 논문에서는 특히 파고율을 주로 다루며, 파고율을 줄이기 위한 새로운 방법을 제시하고자 한다. 제안하고자 하는 방법은 펄스 주파수 변조기법(Pulse Frequency Modulation, PFM)을 이용하며, PFC(Power Factor Correction)가 만드는 50% 벨리필 전압 파형을 PFM 제어 신호로 사용한다. 본 논문에서는 제안하는 PFM 제어 기법으로 파고율을 1.7 이하로 낮출 수 있음을 모의 실험과 실험을 통해 확인하여, 제안한 기법의 타당성을 검증한다.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.17-20
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• 2000

Usually, in many applications, high frequency resonant inverters are used, and the PAM(Pulse Amplitude Modulation), PFM(Pulse Frequency Modulation) or PWM(Pulse Width Modulation) techniques are used to control the output power of resonant inverters. In this paper, a new switching scheme is proposed as a PWM control method. With the proposed method, it can be obtained that unity output displacement factor under the variable resonant frequency. The detail algorithm of the proposed PWM switching scheme and its charicteristics are discussed. And the validity of the proposed method is confirmed with the experimental results.

• Journal of IKEEE
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• v.15 no.2
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• pp.134-142
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• 2011

This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.411-414
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• 2011

This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.2
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• pp.120-127
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• 2009

This paper proposes a new Pulse Frequency Modulation(PFM)-Series Boost Capacitor(SBC) full bridge DC/DC Converter which features a high efficiency and high power density. The proposed converter controls the output voltage by varying the voltage across the series boost capacitor according to switching frequency and has no freewheeling period due to 50% fixed duty operation. As a result, its conduction loss is lower than that of the conventional phase shift full bridge converter. Moreover, ZVS of all power switches can be ensured along wide load ranges and output current ripple is very small. Therefore, it has very desirable merits such as a small output inductor, high efficiency, and improved heat generation. This paper performs a rationale and PSIM simulation of the proposed converter. Finally, experimental results from a 1.2kW(12V, 100A) prototype are presented to confirm the operation, validity and features of the proposed converter.

• Journal of Power Electronics
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• v.3 no.3
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• pp.175-184
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• 2003

In this paper, a new control scheme of Class-E inverter for reducing the crest factor of electronic ballasts for fluorescent lamps using Pulse-Frequency-Modulation (PFM) is Introduced The lifetime of the lamps is guaranteed by decreasing the lamp crest factor and also voltage stress of the switch is significantly decreased by a new scheme although conventional Class-E Inverter is used In this paper. The proposed PFM control scheme didn't use any auxiliary circuit. The proposed control strategy is executed by feeding back the Input voltage, and the zero-voltage-switching (ZVS) is ensured by maintaining constant turn-off time of the switch Therefore, the control principles of proposed method are explained in detail and its validity is verified through several simulations and experimental results.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.14-18
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• 2010

In this paper, we describe a CMOS DC-DC converter with a variable output voltage(5-7V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L,C) has been designed and fabricated on a 0.5um 2-poly 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), cellular Phone, Laptop Computer, etc.