• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.4
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• pp.19-27
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• 2007

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost H-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switch mode equivalent circuits and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft-switching(ZVS) operation ranges, and the power dissipation as compared with those of the conventional type high frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation(PWM) and pulse density modulation(PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.

• Journal of Power Electronics
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• v.14 no.1
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2258-2271
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• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.

• Journal of Power Electronics
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• v.15 no.1
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• pp.65-77
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• 2015

Resonant converters are well suited for induction heating (IH) applications due to their advantages such as efficiency and power density. The control systems of these appliances should provide smooth and wide power control with fewer losses. In this paper, a simple phase locked loop (PLL) based variable duty cycle (VDC) pulse density modulation (PDM) power control scheme for use in class-D inverters for IH loads is proposed. This VDC PDM control method provides a wide power control range. This control scheme also achieves stable and efficient Zero-Voltage-Switching (ZVS) operation over a wide load range. Analysis and modeling of an IH load is done to perform a time domain simulation. The design and output power analysis of a class-D inverter are done for both the conventional pulse width modulation (PWM) and the proposed PLL based VDC PDM methods. The control principles of the proposed method are described in detail. The validity of the proposed control scheme is verified through MATLAB simulations. The PLL loop maintains operation closer to the resonant frequency irrespective of variations in the load parameters. The proposed control scheme provides a linear output power variation to simplify the control logic. A prototype of the class-D inverter system is implemented to validate the simulation results.

• Journal of Power Electronics
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• v.17 no.4
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• pp.933-941
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• 2017

In this paper an improved low frequency selective harmonic elimination-PWM (SHE-PWM) technique for Cascaded H-bridge (CHB) converters is proposed. The proposed method is able to eliminate low order harmonics from the output voltage of the converter for a wide range of modulation indices. To solve SHE-PWM equations, especially for low modulation indices, a modified method is used which employs either the positive or negative voltage polarities of H-bridge cells to increase the freedom degrees of each cell. Freedom degrees of the switching angles are also used to increase the range of available solutions for non-linear SHE equations. The proposed SHE methods can successfully eliminate up to $25^{th}$ harmonic from a 7-level output voltage by using just nine switching transitions or a 150 Hz switching frequency. To confirm the validity of the proposed method, simulation and experimental results have been presented.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.26 no.8
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• pp.1565-1576
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• 2002

By way of driving a 2-way on/off solenoid hydraulic valve with a pulse width modulation (PWM) signal, control of the pressure in a certain volume is frequently used in various applications. However, the pressure built-up according to the duty ratio and carrier frequency of the PWM signal is not so well understood. In order to clarify the characteristics of 2-way valve hydraulic pressure control systems, in this paper two formula fur the mean and ripple of the load pressure were derived through theoretical analysis. And the accuracy of the derived formula were verified by comparison with the experimental test result. Generally 2-way valve systems are constructed as a bleed-off circuit, while 3-way valves are used as a control element in a meter-in circuit pressure control system. In a bleed-off circuit, the system supply pressure from a hydraulic power pack does not remain constant, but changes according to their external load. In turn, the relief valve in the hydraulic power pack reacts accordingly showing complicated dynamic behavior, which makes an analytical study difficult. In order to resolve the problem, simple but accurate empirical dynamic models fer a bleed-off system were used in the course of formula derivation. As the result, selection criteria for two major control parameters of the driving signal is established and the basic strategy to suppress the unnecessary pressure fluctuation can be provided for a hydraulic pressure control system using a 2-way on/off solenoid valve.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.10
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• pp.910-916
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• 2015

A sensorless motor control scheme with conventional back-Electro Motive Force (EMF) sensing based on zero crossing point (ZCP) detection has been widely used in various applications. However, there are several problems with the conventional method for effectively driving sensorless brushless motors. For example, a phase mismatch of 30 degrees occurs between the ZCP and commutation time. Additionally, most of the motor speed/current controls are achieved based on a pulse width modulation (PWM) method, which generates significant noise that distracts the back-EMF sensing. Due to the PWM switching, the ZCP is not deterministic, and thus the efficiency of the motor is reduced because the phase transition points become uncertain. Moreover, the motor driving performance is degraded at a low speed range due to the effect of PWM noise. To solve these problems, an improved back-EMF detection method based on a differential line method is proposed in this paper. In addition, the proposed sensorless BLDC driver addresses the problems by using a variable voltage driver generated from a buck converter. The variable voltage driver does not generate the PWM switching noise. Consequently, the proposed sensorless motor driver improves 1) the signal-to-noise ratio of back-EMF, 2) the operation range of a BLDC motor, and 3) the torque characteristics. The proposed sensorless motor driver is verified through simulations and experiments.

• Journal of Advanced Navigation Technology
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• v.22 no.6
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• pp.654-664
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• 2018

In this paper, this system is operated by PCS that is driven by being synchronized voltage fed inverter and AC source, and in the steady state of power source charge battery connected to DC side with solar cell using a photovoltaic (PV) that it was so called constant voltage charge. it can cause the effect of energy saving of electric power, from 10 to 20%. and through a normal operation of electric energy storage system (EESS). In addition, better output waveform was generated because of pulse width modulation (PWM) method, and it was Proved to test by experiment maintained constant output voltage regardless of AC source disconnection, load variation, and voltage variation of AC power source.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04b
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• pp.10-11
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• 2008

We developed the equipment palpating cell proliferation using a high brightness LED. This equipment was fabricated using a micro-controller and a high brightness LED, and designed to enable us to control light irradiation time, intensity, frequency and so on. Especially, to control the light irradiation frequency, FPGA was used, and to control the change of output value, TLC5941 was used. Control stage is divided into 30 levels by program. Consequently, the current value could be controlled by the change of level in Continue Wave(CW) and Pulse Width Modulation(PWM), and the output of a high brightness LED could be controlled stage by stage. And then, each experiment was performed to irradiation group and non-irradiation group for bone marrow cells. MIT assay method was chosen to verify the cell increase of two groups and the effect of irradiation on cell proliferation was examined by measuring 590nm transmittance of ELISA reader. As a result, the cell increase of bone marrow cells was verified in irradiation group as compared to non-irradiation group.