• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.2
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• pp.107-113
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• 2012

This paper proposes a PDS(Power Transfer Display separation) method for AC-PDP. The proposed PDS method can transfer power and perform an energy recovery by a power conversion circuit operates differently depending on the time. As a result, it uses less of components than conventional PDP power supply and sustain circuit use. Moreover, the manufacturing process can be streamlined. Therefore, the proposed method is suitable for low cost PDP module. To confirm the operation, validity and features of the proposed PDS method, experimental results from a prototype for 42-in diagonal PDP are presented.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.249-252
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• 2000

An experimental multimodal system combining natural input modes such as speech, lip movement, and gaze is proposed in this paper. It benefits from novel human-compute. interaction (HCI) modalities and from multimodal integration for tackling the problem of the HCI bottleneck. This system allows the user to select menu items on the screen by employing speech recognition, lip reading, and gaze tracking components in parallel. Face tracking is a supplementary component to gaze tracking and lip movement analysis. These key components are reviewed and preliminary results are shown with multimodal integration and user testing on the prototype system. It is noteworthy that the system equipped with gaze tracking and lip reading is very effective in noisy environment, where the speech recognition rate is low, moreover, not stable. Our long term interest is to build a user interface embedded in a commercial car navigation system (CNS).

• Journal of the Korean Society for Precision Engineering
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• v.15 no.9
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• pp.82-92
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• 1998

An international standard for the product model data, STEP, and a standard for the distributed object technology, CORBA, will play a very important role in the future manufacturing environment. These two technologies provide background for the sharing of product data and the integration of applications on the network. This paper describes a prototype CAD/CAE environment that is integrated on the network by STEP and CORBA. Several application servers and client software were developed to verify the proposed concept. The present CAD/CAE environments are composed of several individual software components which are not tightly integrated. They also do not utilize the rapidly expanding network and object technologies for the collaboration in the product design process. In the design process in a large organization, sharing of application resources, design data and analysis data through the network will greatly enhance the productivity. The integration between applications can be supported by two key technologies, CORBA(Common Object Request Broker Architecture) and STEP(Standard for the Exchange of Product Model Bata). The CORBA provides interoperability between applications on different machines in heterogeneous distributed environments and seamlessly interconnects distributed object systems. Moreover, if all the data in the CAD/CAE environment are based on the STEP, then we can exclude all the data conversion problems between the application systems.

• Journal of Information Processing Systems
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• v.17 no.5
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• pp.972-988
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• 2021

At present, DevOps environments are getting popular in software organizations due to better collaboration and software productivity over traditional software process models. Software artefacts in DevOps environments are vulnerable to frequent changes at any phase of the software development life cycle that create a continuous integration continuous delivery pipeline. Therefore, software artefact traceability management is challenging in DevOps environments due to the continual artefact changes; often it makes the artefacts to be inconsistent. The existing software traceability related research shows limitations such as being limited to few types of artefacts, lack of automation and inability to cope with continuous integrations. This paper attempts to overcome those challenges by providing traceability support for heterogeneous artefacts in DevOps environments using a prototype named SAT-Analyser. The novel contribution of this work is the proposed traceability process model consists of artefact change detection, change impact analysis, and change propagation. Moreover, this tool provides multi-user accessibility and is integrated with a prominent DevOps tool stack to enable collaborations. The case study analysis has shown high accuracy in SAT-Analyser generated results and have obtained positive feedback from industry DevOps practitioners for its efficacy.

• Advances in Computational Design
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• v.8 no.3
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• pp.237-253
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• 2023

Torque ripple content and variable switching frequency operation of conventional direct torque control (DTC) are reduced by the integration of space vector modulation (SVM) into DTC. Integration of space vector modulation to conventional direct torque control known as SVM-DTC. It had been more frequently used method in renewable energy and machine drive systems. In this paper, SVM-DTC is used to control the rotor side converter (RSC) of a wind driven doubly-fed induction generator (DFIG) because of its advantages such as reduction of torque ripples and constant switching frequency operation. However, flux and torque ripples are still dominant due to distorted current waveforms at different operations of the wind turbine. Therefore, to smoothen the torque profile a Neural Network Controller (NNC) based SVM-DTC has been proposed by replacing the PI controller in the speed control loop of the wind turbine controller. Also, stability analysis and simulation study of DFIG using process reaction curve method (RRCM) are presented. Validation of simulation study in MATLAB/SIMULINK environment of proposed wind driven DFIG system has been performed by laboratory developed prototype model. The proposed NNC based SVM-DTC yields superior torque response and ripple reduction compared to other methods.

• The Journal of the Korea Contents Association
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• v.5 no.1
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• pp.109-116
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• 2005

This paper is to develop the prototype of a decision making for loan granting system at banks and to evaluate the effectiveness of it. The prototype is called at FENET-LG in this paper. The decision to grant a loan is an unstructured and vagueness task because it is required a tremendous amount of data and many complex relationships among them. Evaluating these many data and relationships is a difficult task even for most experienced decision maker of bank. Therefore, where complex judgement is required, the decision maker of bank may benefit from the use of fuzzy expert network to support the evaluation of ability to pay back. Given the characteristics of decision maker of banking facilities judgement task about ability to pay back, the prototype system named FENET-LG is constructed by integration of fuzzy expert system and neural network. The FENET-LG takes advantage of both the deductive approach of fuzzy expert system and the inductive approach of a neural network to provide a decision aid designed to support and facilitate the process of conducting a judgement of ability to pay back.

• Molecules and Cells
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• v.37 no.2
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• pp.140-148
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• 2014

We identified four basic amino acid residues as nuclear localization signals (NLS) in the C-terminal domain of the prototype foamy viral (PFV) integrase (IN) protein that were essential for viral replication. We constructed seven point mutants in the C-terminal domain by changing the lysine and arginine at residues 305, 308, 313, 315, 318, 324, and 329 to threonine or proline, respectively, to identify residues conferring NLS activity. Our results showed that mutation of these residues had no effect on expression assembly, release of viral particles, or in vitro recombinant IN enzymatic activity. However, mutations at residues 305 (R ${\rightarrow}$ T), 313(R ${\rightarrow}$ T), 315(R ${\rightarrow}$ P), and 329(R ${\rightarrow}$ T) lead to the production of defective viral particles with loss of infectivity, whereas non-defective mutations at residues 308(R ${\rightarrow}$ T), 318(K ${\rightarrow}$ T), and 324(K ${\rightarrow}$ T) did not show any adverse effects on subsequent production or release of viral particles. Sub-cellular fractionation and immunostaining for viral protein PFV-IN and PFV-Gag localization revealed predominant cytoplasmic localization of PFV-IN in defective mutants, whereas cytoplasmic and nuclear localization of PFV-IN was observed in wild type and non-defective mutants. However sub-cellular localization of PFV-Gag resulted in predominant nuclear localization and less presence in the cytoplasm of the wild type and non-defective mutants. But defective mutants showed only nuclear localization of Gag. Therefore, we postulate that four basic arginine residues at 305, 313, 315 and 329 confer the karyoplilic properties of PFV-IN and are essential for successful viral integration and replication.

• Archives of design research
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• v.14 no.1
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• pp.27-34
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• 2001

In order to design the products that impression or emotional taste influence the purchase, feedback is necessary as useful data for better idea sketches through users emotional evaluation in early stage of design process. On the other hand, it was required to make judgments individually in previous image evaluations for emotional evaluations such as semantic differential method (SD method) that objects have been considered as classified tendency. However those SD methods are not enough to reflect flexible human capability with similarity judgment in object perceptual process. Therefore, this study proposes a classification of stimulus based on intuitive judgment and a hierarchical image evaluation method based on analysis of hierarchical process and fuzzy integration. The evaluation will be conducted through the order of process, intuitive classification of objective stimulus and items, definition of representatives in each class. Evaluation for each image of the stimulus, calculation of prior raking based on fuzzy integration. The evaluation supportive software is developed to conduct this evaluation process under interactive environments.

• Journal of the Korean Association of Geographic Information Studies
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• v.23 no.4
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• pp.208-216
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• 2020

Recently, issues regarding underground safety such as sink hole, ground subsidence and damage to old underground facilities have been increasing in urban areas, raising the need for more accurate management of underground facilities. Thus, this study derived a technique for comparing spatial data of underground facilities acquired from GPR exploration results acquired at the site with spatial data of integrated underground spatial maps. Using this underground space integrated map-linked service prototype program developed through this study, comparing the location information of the GPR exploration results and the underground space integrated map for the verification of site usability in some sections around Gangnam Station, the results demonstrated that the location of the map is 0.879m maximum, minimum of 0.101m and the average fudge factor was 0.625m. If accuracy of the GPR exploration results is guaranteed, it is judged that it can be used to improve the location accuracy of the underground space integration map.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.399-402
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• 2004

This paper presents a system-on-chip prototype implementing a full integration for a portable digital audio system. The chip is composed of a audio processor block to implements audio decoding and voice compression or decompression software, a system control block including 8-bit MCU core and Memory Management Unit (MMU) a low power 16-bit ${\Sigma}{\Delta}$ CODEC, two DC-to-BC converter, and a flash memory controller. In order to support other audio algorithms except Mask ROM type's fixed codes, a novel 16-bit fixed-point DSP core with the program-download architecture is proposed. Funker, an efficient power management technique such as task-based clock management is implemented to reduce power consumption for portable application. The proposed chip has been fabricated with a 4 metal 0.25um CMOS technology and the chip area is about 7.1 mm ${\times}$ 7.1mm with 100mW power dissipation at 2.5V power supply.