• Title/Summary/Keyword: Process and device simulation

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The Design of the High-frequency SAVEN Device and the 500MHz Latched Comparator using this device (High-frequency SAVEN 소자 설계 및 이를 이용한 500MHz Latched Comparator 설계)

  • Cho, Jung-Ho;Koo, Yong-Seo;Lim, Sin-Il;An, Chul
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.212-215
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    • 1999
  • High-speed device is essential to optoelectric IC for optical storage system such as CD-ROM, DVD, and to ADC for high-speed communication system. This paper represents the BiCMOS process which contains high-speed SAVEN bipolar transistor and analyzes the frequency and switching characteristics of it briefly. Finally, to prove that the SAVEN device is adequate for high-speed system, latched comparator operating at 500MHz is designed with the SPICE parameter extracted from BiCMOS device simulation.

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Simulation of Thick Plate Preheating Process Using Induction Heating (유도가열을 이용한 후판 예열공정 시뮬레이션)

  • Oh, Yong Hee;Cho, Young Tae;Jung, Yoon Gyo
    • Journal of the Korean Society for Precision Engineering
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    • v.32 no.12
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    • pp.1017-1021
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    • 2015
  • Induction heating has been applied to the preheating process in various industrial fields. It has been used as a simple device structure, limiting the heating zone through controlled variables, and free-welding positions. It would be helpful to weld thick plates with arc welding such as GMAW. The induction heating process is well suited to this process. In this study, in order to find suitable induction heating parameters, a simulation was conducted with multi physics S/W. Three kinds of material were heated by induction coils designed specially for thick plate. Consequently, steel and nimonic alloy were the most efficient materials for preheating by induction. It can be concluded that the induction heating process is a good method for preheating the thick plate.

The Design and Implementation of an Educational Computer Model for Semiconductor Manufacturing Courses (반도체 공정 교육을 위한 교육용 컴퓨터 모델 설계 및 구현)

  • Han, Young-Shin;Jeon, Dong-Hoon
    • Journal of the Korea Society for Simulation
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    • v.18 no.4
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    • pp.219-225
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    • 2009
  • The primary purpose of this study is to build computer models referring overall flow of complex and various semiconductor wafer manufacturing process and to implement a educational model which operates with a presentation tool showing device design. It is important that Korean semiconductor industries secure high competitive power on efficient manufacturing management and to develop technology continuously. Models representing the FAB processes and the functions of each process are developed for Seoul National University Semiconductor Research Center. However, it is expected that the models are effective as visually educational tools in Korean semiconductor industries. In addition, it is anticipated that these models are useful for semiconductor process courses in academia. Scalability and flexibility allow semiconductor manufacturers to customize the models and perform simulation education. Subsequently, manufacturers save budget.

Study on 3.3 kV Super Junction Field Stop IGBT According to Design and Process Parameters (설계 및 공정 파라미터에 따른 3.3 kV급 Super Junction FS-IGBT에 관한 연구)

  • Kang, Ey Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.4
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    • pp.210-213
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    • 2017
  • In this paper, we analyzed the structural design and electrical characteristics of a 3.3 kV super junction FS IGBT as a next generation power device. The device parameters were extracted by design and process simulation. To obtain optimal breakdown voltage, we researched the breakdown characteristics. Initially, we confirmed that the breakdown voltage decreased as trench depth increased. We analyzed the breakdown voltage according to p pillar dose. As a result of the experiment, we confirmed that the breakdown voltage increased as p pillar dose increased. To obtain more than 3.3 kV, the p pillar dose was $5{\times}10^{13}cm^{-2}$, and the epi layer resistance was $140{\Omega}$. We extracted design and process parameters considering the on state voltage drop.

An Analytical Expression for Current Gain of an IGBT

  • Moon, Jin-Woo;Chung, Sang-Koo
    • Journal of Electrical Engineering and Technology
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    • v.4 no.3
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    • pp.401-404
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    • 2009
  • A simple analytical expression for a current gain of IGBT is derived in terms of the device parameters as well as a gate length dependent parameter, which allows for the determination of the current components of the device as a function of its gate length. The analytical results are compared with those from simulation results. A good agreement is found.

An Analysis for the Dynamics of a Pico Slider during the Ramp Loading Process (Ramp Loading 피코 슬라이더의 거동 해석)

  • Kim Bum-Joon;Cho Kwang-Pyo;Rhim Yoon-Chul
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 2003.11a
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    • pp.291-298
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    • 2003
  • Recently, load/unload(L/UL) process is applied to a computer information storage device due to its advantages such as lower power consumption, larger data zone, simpler fabrication of disk for no bumped parking zone, and rarer contact between the slider and media. An analysis of the transient motion for the slider is very important to design an air bearing surface (ABS) of the slider to secure the stable performance of the system. During the L/UL process, however, there are several issues occurred such as contact or collision between slider and media. Sometimes this will cause the system failure. In this study, the dynamics of the slider during the loading process are investigated through a numerical simulation using FEM analysis and experiment.

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Design of a DC-DC Converter for Portable Device (휴대기기용 DC-DC 부스트 컨버터 집적회로설계)

  • Lee, Ja-kyeong;Song, Han-Jung
    • Journal of Korea Society of Industrial Information Systems
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    • v.22 no.2
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    • pp.71-78
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    • 2017
  • In This Paper, A DC-DC Boost Converter for Portable Device has been Proposed. The Converter Which is Operated with 1 MHz High Switching Frequency is Capable of Reducing Mounting Area of Passive Devices Such as Inductor and Capacitor, Consequently is Suitable for Portable Device. This Boost Converter Consists of a Power Stage and a Control Block and a Protect Block. Proposed DC-DC Boost Converter has been Designed a 0.18 um Magnachip CMOS Process Technology, we Examined Performances of the Fabricated Chip and Compared its Measured Results with SPICE Simulation Data. Simulation Results Show that the Output Voltage is 4.8 V in 3.3 V Input Voltage, Output Current 95 mA Which is Larger than 20~50 mA.

Control Level Process Modeling Methodology Based on PLC (PLC 기반 제어정보 모델링 방법론)

  • Ko, Min-Suk;Kwak, Jong-Geun;Wang, Gi-Nam;Park, Sang-Chul
    • Journal of the Korea Society for Simulation
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    • v.18 no.4
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    • pp.67-79
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    • 2009
  • Because a product in the car industry has a short life cycle in recent years, the process planning and the manufacturing lines have to be changed frequently. Most of time, repositioning an existing facility and modifying used control information are faster than making completely new process planning. However, control information and control code such as PLC code are difficult to understand. Hence, industries prefer writing a new control code instead of using the existing complex one. It shows the lack of information reusability in the existing process planning. As a result, to reduce this redundancy and lack of reusability, we propose a SOS-Net modeling method. SOS-Net is a standard methodology used to describe control information. It is based on the Device Structure which consists of sensor information derived from device hardware information. Thus, SOS-Net can describe a real control state for automated manufacturing systems. The SOS-Net model is easy to understand and can be converted into PLC Code easily. It also enables to modify control information, thus increases the reusability of the new process planning. Proposed model in this paper plays an intermediary role between the process planning and PLC code generation. It can reduce the process planning and implementation time as well as cost.

Study on the Development of Integrated Vibration and Sound Generator (휴대폰용 일체형 음향 및 진동 발생장치 개발을 위한 연구)

  • 신태명;안진철
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.13 no.11
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    • pp.875-881
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    • 2003
  • The received signal of a mobile phone is normally sensed through two independent means which are the sound generation of a speaker and vibration generation of a vibration motor. As an improvement scheme to meet the consumer's demand on weight reduction and miniaturization of a mobile phone, the design and development of an integrated vibration and sound generating device are performed in this research. To this purpose, the optimal shapes of the voice coil. the permanent magnet and the vibration plate are designed, and the excitation force applied to the vibration system of the new device is estimated and verified through theoretical analyses, computer simulation, and experiments using an expanded model. In addition, vibration performance comparison of the device with the existing vibration motor is performed, and from the overall process, therefore, the method and procedure for the vibration performance analysis of the integrated vibration and sound generating device are established.

A Study on the Corner Effect of Fin-type SONOS Flash Memory Using TCAD Simulation (TCAD 시뮬레이션을 이용한 Fin형 SONOS Flash Memory의 모서리 효과에 관한 연구)

  • Yang, Seung-Dong;Oh, Jae-Sub;Yun, Ho-Jin;Jeong, Kwang-Seok;Kim, Yu-Mi;Lee, Sang-Youl;Lee, Hee-Deok;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.2
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    • pp.100-104
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    • 2012
  • Fin-type SONOS (silicon-oxide-nitride-oxide-silicon) flash memory has emerged as novel devices having superior controls over short channel effects(SCE) than the conventional SONOS flash memory devices. However despite these advantages, these also exhibit undesirable characteristics such as corner effect. Usually, the corner effect deteriorates the performance by increasing the leakage current. In this paper, the corner effect of fin-type SONOS flash memory devices is investigate by 3D Process and device simulation and their electrical characteristics are compared to conventional SONOS devices. The corner effect has been observed in fin-type SONOS device. The reason why the memory characteristic in fin-type SONOS flash memory device is not improved, might be due to existing undesirable effect such as corner effect as well as the mutual interference of electric field in the fin-type structure as reported previously.