• 제목/요약/키워드: Power semiconductor device

검색결과 453건 처리시간 0.026초

위성 통신 시스템 응용을 위한 우수한 성능의 Ku 대역 2W MMIC 전력증폭기 (High Performance Ku-band 2W MMIC Power Amplifier for Satellite Communications)

  • 류근관;안기범;김성찬
    • 한국정보통신학회논문지
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    • 제18권11호
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    • pp.2697-2702
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    • 2014
  • 본 논문에서는 위성 통신 시스템 응용을 위하여 Ku 대역에서 동작 가능한 2W MMIC (monolithic microwave integrated circuit) 전력증폭기를 개발하였다. 2W MMIC 전력증폭기는 WIN (wireless information networking) semiconductor Corp.의 GaAs 기반 PHEMT (pseudomorphic high electron mobility transistor) 공정을 사용하여 개발되었다. 개발된 Ku 대역 2W MMIC 전력증폭기의 측정결과, 13.75 GHz ~ 14.5 GHz의 동작주파수 범위에서 29 dB 이상의 이득, 33.4 dBm 이상의 포화 출력전력을 얻었다. 특히 전력부가효율은 29 %로 기존에 발표된 GaAs 기반 Ku 대역 2W MMIC 전력증폭기 상용 제품들에 비하여 높은 결과를 얻을 수 있었다.

다수 및 소수캐리어 소자에 적용 가능한 영전압영전류 스위칭 컨버터 (A New ZVZCS Converter Applicable to Majority and Minority Carrier Devices)

  • 안희욱;김학성
    • 전력전자학회논문지
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    • 제10권5호
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    • pp.518-525
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    • 2005
  • 제안된 회로는 하나의 보조스위치를 이용하여 주 스위치와 정류용 다이오드가 턴-온/턴-오프 시 동시에 영전압과 영전류 조건을 만족시킨다. 그리고 이 회로에 사용되는 주 스위치는 다수 캐리어 소자뿐만 아니라 소수 캐리어 반도체 소자까지 사용할 수 있는 장점을 가지고 모든 PWM 컨버터에 적용 가능하다. 그리고 제안된 보조 스위치와 공진회로가 주 전력 경로에 존재하지 않으므로 주 스위치와 다이오드에 더 이상의 전압/전류 스트레스가 없게 된다. 제안된 컨버터의 유효성을 이론적 분석과 실험을 통하여 입증하였다.

4H-SiC Planar MESFET for Microwave Power Device Applications

  • Na, Hoon-Joo;Jung, Sang-Yong;Moon, Jeong-Hyun;Yim, Jeong-Hyuk;Song, Ho-Keun;Lee, Jae-Bin;Kim, Hyeong-Joon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권2호
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    • pp.113-119
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    • 2005
  • 4H-SiC planar MESFETs were fabricated using ion-implantation on semi-insulating substrate without recess gate etching. A modified RCA method was used to clean the substrate before each procedure. A thin, thermal oxide layer was grown to passivate the surface and then a thick field oxide was deposited by CVD. The fabricated MESFET showed good contact properties and DC/RF performances. The maximum oscillation frequency of 34 GHz and the cut-off frequency of 9.3 GHz were obtained. The power gain was 10.1 dB and the output power of 1.4 W was obtained for 1 mm-gate length device at 2 GHz. The fabricated MESFETs showed the charge trapping-free characteristics and were characterized by the extracted small-signal equivalent circuit parameters.

Drain-current Modeling of Sub-70-nm PMOSFETs Dependent on Hot-carrier Stress Bias Conditions

  • Lim, In Eui;Jhon, Heesauk;Yoon, Gyuhan;Choi, Woo Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권1호
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    • pp.94-100
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    • 2017
  • Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

Measurement of Plasma Density Generated by a Semiconductor Bridge: Related Input Energy and Electrode Material

  • Kim, Jong-Dae;Jungling, K.C.
    • ETRI Journal
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    • 제17권2호
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    • pp.11-19
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    • 1995
  • The plasma densities generated from a semiconductor bridge (SCB) device employing a capacitor discharge firing set have been measured by a novel diagnostic technique employing a microwave resonator probe. The spatial resolution of the probe is comparable to the separation between the two wires of the transmission lines (${\approx}$3 mm). This method is superior to Langmuir probes in this application because Langmuir probe measurements are affected by sheath effects, small bridge area, and unknown fraction of multiple ions. Measured electron densities are related to the land material and input energy. Although electron densities in the plasma generated by aluminum or tungsten-land SCB devices show a general tendency to increase steadily with power, at the higher energies, the electron densities generated from tungsten-land SCB devices are found to remain constant.

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A Study of SCEs and Analog FOMs in GS-DG-MOSFET with Lateral Asymmetric Channel Doping

  • Sahu, P.K.;Mohapatra, S.K.;Pradhan, K.P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제13권6호
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    • pp.647-654
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    • 2013
  • The design and analysis of analog circuit application on CMOS technology are a challenge in deep sub-micrometer process. This paper is a study on the performance value of Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with Gate Stack and the channel engineering Single Halo (SH), Double Halo (DH). Four different structures have been analysed keeping channel length constant. The short channel parameters and different sub-threshold analog figures of merit (FOMs) are analysed. This work extensively provides the device structures which may be applicable for high speed switching and low power consumption application.

반도체 레이저 다이오드의 횡방향 1차모드의 특성 해석 (An analysis of the lateral first-order mode characteristics for the semiconductor laser diodes)

  • 김형래;곽계달
    • 전자공학회논문지A
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    • 제32A권12호
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    • pp.91-100
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    • 1995
  • This paper represents the lateral first-order mode characteristics for the semiconductor laser diodes using a two-dimensional numerical simulator. In order to analyze the lateral first-order mode characteristics, Helmholtz wave equation is solved twice for the lateral fundamental and the first-order mode considering the mode gain, total losses, and the recombination rate due to the stimulated emission radiation for the each mode independantly. Through this procedure, we find that the lateral first-order mode was easily guided as increasing the stripe width for the index-guiding structures, and that the lateral first-order mode seems to be dominated in the distribution of total light intensity when its output power reaches nearly half of that of the lateral fundamental mode. This results may be used to design the device structure which guides only the lateral fundamental mode.

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3차원 영상구현을 위한 OLED 단위소자 특성에 대한 연구 (Study on performance of unit OLED device for 3-dimensional image-process)

  • 이정호;김재인;오영해
    • 한국광학회:학술대회논문집
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    • 한국광학회 2005년도 하계학술발표회
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    • pp.204-205
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    • 2005
  • Studies on display has been requested some major changes due to the high growth of the handheld terminal market. Therefore, the self emitting OLED(Organic Light Emitting Diode) has been interested as a next generation flat plane display because of its preeminent characteristics such as quick response characteristics, higher performance viewing angle, low power consumption, and panel floating. However, a trend of the display market is moving to three dimensional image processing instead of two dimensional flat display and various researches on display using hologram makes up for the difficulty in three dimensional display using typical flat display. In this study the Lenticular Screen Printing method is presented so that it can be applicable to organic semiconductor display devices and makes possible three dimensional display using flat display for complement the drawback of inorganic semiconductor.

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글로벌 파운드리 Big3의 첨단 패키징 기술개발 동향 (Development Trends in Advanced Packaging Technology of Global Foundry Big Three)

  • 전황수;최새솔;민대홍
    • 전자통신동향분석
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    • 제39권3호
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    • pp.98-106
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    • 2024
  • Advanced packaging is emerging as a core technology owing to the increasing demand for multifunctional and highly integrated semiconductors to achieve low power and high performance following digital transformation. It may allow to overcome current limitations of semiconductor process miniaturization and enables single packaging of individual devices. The introduction of advanced packaging facilitates the integration of various chips into one device, and it is emerging as a competitive edge in the industry with high added value, possibly replacing traditional packaging that focuses on electrical connections and the protection of semiconductor devices.

Power Semiconductor SMD Package Embedded in Multilayered Ceramic for Low Switching Loss

  • Jung, Dong Yun;Jang, Hyun Gyu;Kim, Minki;Jun, Chi-Hoon;Park, Junbo;Lee, Hyun-Soo;Park, Jong Moon;Ko, Sang Choon
    • ETRI Journal
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    • 제39권6호
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    • pp.866-873
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    • 2017
  • We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.