• 대한전자공학회논문지
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• 제12권5호
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• pp.12-18
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• 1975

Triac phase controlled pre-regulator를 이용한 직류안정화전원에서 제어소자 전력소모를 촤소로 줄이기 위하여, 부하전류의 증가에 따라 제어소자 양단전압을 낮추어 주는 회로를 고안하여 부가하였다. 이렇게 하므로써 제어소자의 전력소모가 약 40%정도 감소되어 방열장치가 간단해지거나 전력용량을 증가할 수 있게 되었으며 열발산이 곤란한 monolithic I.C.화에 유용하도록 하였다. A method on minimizing the power dissipation in the control element of a series D.C. voltage regutator is devised. An additional control circuit which reduces the average voltage drop across the control element according to increasing the load current is attached :o the trial phase controlled pre-regulator system. It is verified that the power dissipation in the control element is reduced up to 40% by this. circuit arrangement. The heat sink system can be simplified and the capacity of tile handling power is also increased. It is expected that this circuit arrangement can be applied to I.C. fabrication.

• 한국전기전자재료학회논문지
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• 제25권10호
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• pp.786-790
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• 2012

A variety of diagnostic tests are widely applied in the field in industry to evaluate the condition of high voltage (HV) motor stator insulation. In this paper, the influence of temperature on the stator insulation diagnostic tests such as the insulation resistance, AC current, dissipation factor, and partial discharge measurements are studied and reported. The tests are performed with the HV motor stator winding temperature set between $40^{\circ}C$ to $80^{\circ}C$ in $10^{\circ}C$ intervals. It is shown that the AC current, dissipation factor, and partial discharge magnitude steadily increase with temperature, which suggests that temperature must be taken into account in the interpretation of the test results.

• Journal of information and communication convergence engineering
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• 제9권3호
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• pp.301-304
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• 한국전자통신학회논문지
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• 제2권3호
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• pp.163-167
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• 2007

본 논문에서는 전력 소비를 감소시킬 수 있는 클럭게이팅 기법을 제안하여 8bit RISC 마이크로프로세서를 설계하였다. 제안된 설계 방법의 타당성을 검토하기 위해서 저전력을 고려하지 않은 8비트 마이크로프로세서와 클록 게이팅을 이용한 저전력 8비트 마이크로프로세서를 설계하여 소모 전력을 비교하였다. 기존의 마이크로 프로세서와 저전력으로 설계된 마이크로프로세서와의 소모 전력을 비교한 결과 시간에 대하여 비교하였을 경우 동적 소모 전력에 대하여 21.56% 감소를 얻을 수 있었다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 춘계학술대회
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• pp.692-695
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• ETRI Journal
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• 제35권2호
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권3호
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• pp.341-352
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• 2012

This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.

• 한국지반신소재학회논문집
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• 제12권1호
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• pp.83-92
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• 2013

지중송전관로를 통한 송전용량 증대를 위해서는 송전 시 발생하는 열을 빠르게 소산시킬 수 있도록 습윤 시 $50^{\circ}C$-cm/Watt, 건조 시 $100^{\circ}C$-cm/Watt 이하의 열 저항률을 갖는 재료를 되메움재로 사용하는 것이 요구되며, 이를 위해 선행연구에서는 요구되는 조건을 만족시키는 열 소산 되메움재를 개발하였다. 이 연구에서는 개발된 열 소산 되메움재의 열 소산효과를 알아보기 위하여 1회선의 단면을 현장에 설치하고 개발된 열 소산 되메움재와 강모래, 현장토에 대하여 열을 직접 가하고 일정한 지점에서 온도를 측정함으로서 현장시험을 수행하였고, 시험결과와 유한요소해석과의 비교를 통해 열 소산효과를 비교하였다. 비교결과, 열원과 가까운 지점에서는 개발된 열 소산 되메움재가 강모래와 현장토에 비해 열평형상태에 빨리 도달하는 것으로 나타났으며, 열평형에 도달하는 온도도 높은 것으로 나타나 열 소산효과가 우수한 것으로 나타났다. 또한 다른 지점에서도 개발된 되메움재가 다른 재료보다 온도가 높아 열 소산효과가 우수한 것으로 나타났다. 또한 함수비의 변화에도 열 소산효과가 크게 변화하지 않는 것으로 나타났다.

• 마이크로전자및패키징학회지
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• 제21권3호
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• pp.7-17
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• 2014

Power electronics modules are semiconductor components that are widely used in airplanes, trains, automobiles, and energy generation and conversion facilities. In particular, insulated gate bipolar transistors(IGBT) have been widely utilized in high power and fast switching applications for power management including power supplies, uninterruptible power systems, and AC/DC converters. In these days, IGBT are the predominant power semiconductors for high current applications in electrical and hybrid vehicles application. In these application environments, the physical conditions are often severe with strong electric currents, high voltage, high temperature, high humidity, and vibrations. Therefore, IGBT module packages involves a number of challenges for the design engineer in terms of reliability. Thermal and thermal-mechanical management are critical for power electronics modules. The failure mechanisms that limit the number of power cycles are caused by the coefficient of thermal expansion mismatch between the materials used in the IGBT modules. All interfaces in the module could be locations for potential failures. Therefore, a proper thermal design where the temperature does not exceed an allowable limit of the devices has been a key factor in developing IGBT modules. In this paper, we discussed the effects of various package materials on heat dissipation and thermal management, as well as recent technology of the new package materials.