• 제목/요약/키워드: Power amplifiers

검색결과 399건 처리시간 0.032초

The Wireless Network Optimization of Power Amplification via User Volume in the Microcell Terrain

  • Guo, Shengnan;Jiang, Xueqin;Zhang, Kesheng
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제12권6호
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    • pp.2581-2594
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    • 2018
  • The microcell terrain is the most common wireless network terrain in our life. In order to solve wireless network optimization of weak coverage in the microcell terrain, improve call quality and reduce the cost of the premise, power amplifiers in base stations should be adjusted according to user volume. In this paper, characteristics of microcell topography are obtained after analysis. According to the topography characteristics of different microcells, changes in the number of users at different times have been estimated, meanwhile, the number of scatter users are also obtained by monitoring the PCCPCH RSCP and other parameters. Then B-Spline interpolation method has been applied to scatter users to obtain the continuous relationship between the number of users and time. On this basis, power amplification can be chosen according to changes in the number of users. The methods adopted by this paper are also applied in the engineering practice, sampling and interpolation are used to obtain the number of users at all times, so that the power amplification can be adjusted by the number of users in a microcell. Such a method is able to optimize wireless network and achieve a goal of expanding the area of base stations, reduce call drop rate and increase capacity.

에러 피드백 기술을 이용한 피드 포워드 선형 전력 증폭기 (A Feedforward Linear Power Amplifier using Error Feedback Technique)

  • 김완종;조경준;김종헌;김남영;이종철;이병제
    • 한국전자파학회논문지
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    • 제11권8호
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    • pp.1407-1413
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    • 2000
  • 본 논문에서는 기지국용 전력 증폭기의 혼 변조 성분들을 극도로 억압하기 위해서 Error feedback 방식을 사용한 Feedforward 선형 전력 증폭기를 설계하였다. 특히, 제안된 선형 전력 증폭기는 기존의 피드백 기술의 단점인 증폭 이득의 손실을 없앤 Error feedback 기술과 Feedforward 기술을 혼합하여 적용하였다. 제안된 선형 전력 증폭기는 HP사의 EEsof ADS ver.1.3을 사용해서 설계.제작하였다. 측정결과, 이득 28 ㏈, P1㏈ 31 ㏈m인 주 전력 증폭기에 -7 ㏈m/tone을 갖는 1850 MHz와 1851.25 MHz의 2-tone 신호를 인가한 결과 전체 IMD가 약 35 ㏈ 개선되었다.

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An optimization technique for simultaneous reduction of PAPR and out-of-band power in NC-OFDM-based cognitive radio systems

  • Kaliki, Sravan Kumar;Golla, Shiva Prasad;Kurukundu, Rama Naidu
    • ETRI Journal
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    • 제43권1호
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    • pp.7-16
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    • 2021
  • Noncontiguous orthogonal frequency division multiplexing (NC-OFDM)-based cognitive radio (CR) systems achieve highly efficient spectrum utilization by transmitting unlicensed users' data on subcarriers of licensed users' data when they are free. However, there are two disadvantages to the NC-OFDM system: out-of-band power (OBP) and a high peak-to-average power ratio (PAPR). OBP arises due to side lobes of an NC-OFDM signal in the frequency domain, and it interferes with the spectrum for unlicensed users. A high PAPR occurs due to the inverse fast Fourier transform (IFFT) block used in an NC-OFDM system, and it induces nonlinear effects in power amplifiers. In this study, we propose an algorithm called "Alternative Projections onto Convex and Non-Convex Sets" that reduces the OBP and PAPR simultaneously. The alternate projections are performed onto these sets to form an iteration, and it converges to the specified limits of in-band-power, peak amplitude, and OBP. Furthermore, simulations show that the bit error rate performance is not degraded while reducing OBP and PAPR.

저전압 고속 전류형 Pipelined A/D 변환기의 설계 (Design of A Low-Voltage and High-Speed Pipelined A/D Converter Using Current-Mode Signals)

  • 박승균;이희덕;한철희
    • 전자공학회논문지A
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    • 제31A권3호
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    • pp.18-27
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    • 1994
  • An 8-bit 2-stage pipelined current mode A/D converter is designed with a new architecture, where the wideband track-and-hold amplifiers which have 2 integrators in parallel sample input signal twice per clock cycle. The conversion speed of the A-D converter is two times faster than that of conventional pipelined method. The converter is designed to be operated at the power supply voltage of 3.3V with the input dynamic range of 0-256$\mu$A. HSPICE simulation results show the performance of up to 55Msamples/s and power consumption of 150mW with the parameters of ISRC $1.5\mu$m BICMOS process. The chip area is 3${\times}4mm^{2}$.

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고출력증폭기의 비선형성 보정을 위한 비선형 적응 Predistorter (A Nonlinear Adaptive Predistorter for the Compensation of Nonlinearities in High Power Amplifier)

  • 임용훈;서정태;윤대희;서광락;소용수
    • 전자공학회논문지B
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    • 제31B권7호
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    • pp.16-25
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    • 1994
  • The major reason that reduces the performance of satellite communication channels is known as the nonlinearities of high power amplifiers(HPA's) which are usually modeled by memoryless nonlinear systems, in the channels. This paper proposes a nonlinear adaptive predistorter,which predistorts the input symbols such that the symbol passing through the nonlinear HPA preserves the desired constellation, and derives the region of convergence for the predistorter. The predistorter has capability of coping adaptively with any time-varying environment such as changes of operating points if HPA since the coefficients of the predistorter which has a form of truncated Tayler series are obtained by recursive optimization procedure utilizing QAM data sequence directely. Simulation results show that the proposed one with 16 QAM input has better performance than the conventional fixed predistorter with the same input.

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이동통신용 고출력 증폭기를 위한 적응 사전왜곡기의 설계 (Design of an Adaptive Predistorter for High Power Amplifiers for Mobile Communications)

  • 김형호;임성빈;김종훈;신요안
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 제13회 신호처리 합동 학술대회 논문집
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    • pp.573-576
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    • 2000
  • 현재 사용되고 있는 CDMA 시스템에서는 기지국 내에 사용되는 고출력 증폭기(high power. amplifier)의 비선형 특성으로 인해, 시스템의 송신 신호는 심각한 비선형 왜곡을 겪게되고 이는 결국 시스템의 성능을 크게 악화시키는 요인으로 작용한다. 이러한 고출력 증폭기의 비선형성은 출력 신호 레벨을 선형 영역으로 충분히 backing-off 시킴으로써 감소시킬 수 있으나, 이는 송신 신호의 출력을 과도하게 감소시키게 되어 결국 fade margin을 감소시키는 결과를 가져온다. 본 논문에서는 이러한 고출력 증폭기에서 발생하는 비선형 왜곡을 보상할 수 있는 디지털 사전왜곡기를 하드웨어적으로 직접 구현하여 고출력 증폭기의 특성이 변할 때,LMS 알고리듬을 이용하여 LUT의 값을 갱신함으로써 보다 효과적인 적응 사전왜곡기를 설계하는데 목적이 있다.

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회전체 진동 감소를 위한 마그네틱 댐퍼의 설계 및 응용 (Design and Application of Magnetic Damper for Reducing Rotor Vibration)

  • 김영배;이형복;이봉기
    • 대한기계학회논문집A
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    • 제24권2호
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    • pp.355-361
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    • 2000
  • In this study, active control magnetic actuator for reducing vibration of rotor system is performed. Identification, modeling, simulation, control system design, and evaluation of active magnetic damper system have been researched. Power amplifier modeling, connected magnetic actuator and augmented by system identification, is included to establish a magnetic damper simulation which provides close performance correspondence to the physical plant. A magnetic actuator, digital controller using DSP(Digital Signal Processor), and bipolar operational power supply/amplifiers are developed to show the effectiveness of reducing rotor vibration. Also the curve fitting procedure to obtain the transfer function of frequency dependent components is developed. Two kinds of test are executed as sliding and oil bearing. Results presented in this paper will provide a well-defined technical parameters in designing magnetic damper system for the proposed rotor.

휴대용 기기를 위한 CMOS DC-DC 변환기 설계 (Design of a CMOS DC-to-DC Converter for Portable Devices)

  • 오남걸;이재경;조인형;장수훈;차충현;유종근
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 학술대회 논문집 정보 및 제어부문
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    • pp.520-521
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    • 2008
  • This paper describes a low voltage, low-power CMOS buck DC/DC converter, which has a simple common-gate current sensing circuit. It consumes low power because it includes less transistors than other converters which use operational amplifiers for current sensing. The designed DC-DC converter is fabricated in a 0.18um CMOS technology. A maximum efficiency of 88% has been obtained with the proposed circuit. It has $2V{\sim}3.7V$ input voltage range, $1V{\sim}2.5V$ output voltage range and maximum output current of 1000mA.

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직력 캐패시터를 가진 E급 공진형 정류기 설계에 관한 연구 (A Study on the Design of the Class E Resonant Rectifier with a Series Capacitor)

  • 김남호
    • Journal of Advanced Marine Engineering and Technology
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    • 제22권3호
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    • pp.343-352
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    • 1998
  • Higher frequency of energy transfer or at least energy conversion has to be used in order to reduce the size of inductors and capacitors required in the power supplies. Conventional PWM switching-mode power supplies have a limitation of operating frequency due to switching losses in the switching transistors and rectifier diodes. Means of reducing switching losses have been developed for high-frequency resonant amplifiers or more exactly dc/ac inverters. Because of smooth current and voltage waveforms resonant convertesrs havelower device switching losses and stresses lower electromagnetic interference(EMI) and lower noise than PWM converters. Therefore in this paper design equations of Classs E resonant low dv/dt rectifier with a series resonant capacitor drived using Fourier series techniques. The theory is compared with simulation results obtained for the rectifier operating at 10[MHz] ac input and 5[V] coutput.

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Manufacturing of GaAs MMICs for Wireless Communications Applications

  • Ho, Wu-Jing;Liu, Joe;Chou, Hengchang;Wu, Chan Shin;Tsai, Tsung Chi;Chang, Wei Der;Chou, Frank;Wang, Yu-Chi
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권3호
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    • pp.136-145
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    • 2006
  • Two major processing technologies of GaAs HBT and pHEMT have been released in production at Win Semiconductors corp. to address the strong demands of power amplifiers and switches for both handset and WLAN communications markets. Excellent performance with low processing cost and die shrinkage features is reported from the manufactured MMICs. With the stringent tighter manufacturing quality control WIN has successfully become one of the major pure open foundry house to serve the communication industries. The advancing of both technologies to include E/D-pHEMTs and BiHEMTs likes for multifunctional integration of PA, LNA, switch and logics is also highlighted.