• Title/Summary/Keyword: Power Mode

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Global Sliding Mode Control based on a Hyperbolic Tangent Function for Matrix Rectifier

  • Hu, Zhanhu;Hu, Wang;Wang, Zhiping;Mao, Yunshou;Hei, Chenyang
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.991-1003
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    • 2017
  • The conventional sliding mode control (CSMC) has a number of problems. It may cause dc output voltage ripple and it cannot guarantee the robustness of the whole system for a matrix rectifier (MR). Furthermore, the existence of a filter can decrease the input power factor (IPF). Therefore, a novel global sliding mode control (GSMC) based on a hyperbolic tangent function with IPF compensation for MRs is proposed in this paper. Firstly, due to the reachability and existence of the sliding mode, the condition of the matrix rectifier's robustness and chattering elimination is derived. Secondly, a global switching function is designed and the determination of the transient operation status is given. Then a SMC compensation strategy based on a DQ transformation model is applied to compensate the decreasing IPF. Finally, simulations and experiments are carried out to verify the correctness and effectiveness of the control algorithm. The obtained results show that compared with CSMC, applying the proposed GSMC based on a hyperbolic tangent function for matrix rectifiers can achieve a ripple-free output voltage with a unity IPF. In addition, the rectifier has an excellent robust performance at all times.

High Efficiency Bridgeless Power Factor Correction Converter With Improved Common Mode Noise Characteristics (우수한 공통 모드 노이즈 특성을 가진 브릿지 다이오드가 없는 고효율 PFC 컨버터)

  • Jang, Hyo-Seo;Lee, Ju-Young;Kim, Moon-Young;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.2
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    • pp.85-91
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    • 2022
  • This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

Low Power Consumption Technology for Streaming Data Playback in the IPTV Set-top Box (IPTV 셋톱박스 환경에서 스트리밍 데이터 재생을 위한 전력 소모 감소 기법)

  • Go, Young-Wook;Yang, Jun-Sik;Kim, Deok-Hwan
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.1
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    • pp.30-40
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    • 2010
  • The hard disk is one of the most frequently used storage in IPTV sep-top box. It has large storage capacity and provides fast I/O speed compared to its price whereas it causes high power consumption due to mechanical characteristics of spindle motor. In order to play streaming data in the set-top box, spindle motor of hard disk keeps active mode and it causes high power consumption. In this paper, We propose an offset-buffering and multi-mode spin-down method to reduce power consumption for streaming data playback. The offset-buffering inspects the user's viewing pattern and performs buffering based on the analysis of viewing pattern. So, it can maintain the status of spindle motor as idle mode for long time. Besides, it can reduce power consumption by spinning down according to offset-buffer size. The experimental result shows that proposed offset-buffering and multi mode spin-down method is about 28.3% and 12.5% lower than the full-Buffering method in terms of the power consumption and spin-down frequency, respectively.

A Low Power scan Design Architecture (저전력을 고려한 스캔 체인 구조 변경)

  • Min, Hyoung-Bok;Kim, In-Soo
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.7
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    • pp.458-461
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    • 2005
  • Power dissipated during test application is substantially higher than power dissipated during functional operation which can decrease the reliability and lead to yield loss. This paper presents a new technique for power minimization during test application in full scan sequential circuits. This paper shows freezing of combinational logic parts during scan shift operation in test mode. The freezing technique leads to power to minimization. Significant power reduction in the scan techniques is achieved on ISCAS 89 benchmarks.

Development Tendency of Sliding Mode Frequency Shift Type Anti-Islanding of Japanese Companies

  • Jeong, Ji-Won;Kim, Dong-Hee;Lee, Byoung-Kuk
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.2
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    • pp.222-228
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    • 2014
  • As tightened the grid connection related regulation for a distributed power generation Japan, islanding of the distributed power generation should be detected more rapidly. In this paper, it is introduced the development tendency of sliding mode frequency shift type anti-islanding technology in Japanese companies.

Design of a 12 bit current-mode folding/interpolation CMOS A/D converter (12비트 전류구동 폴딩.인터폴레이션 CMOS A/D 변환기 설계)

  • 김형훈;윤광섭
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.986-989
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    • 1999
  • An 12bit current-mode folding and interpolation analog to digital converter (ADC) with multiplied folding amplifiers is proposed in this paper. A current - mode multiplied folding amplifier is employed not only to reduced the number of reference current source, but also to decrease a power dissipation within the ADC. The designed ADC fabricated by a 0.6${\mu}{\textrm}{m}$ n-well CMOS double metal/single poly process. The simulation result shows the power dissipation of 280㎽ with a power supply of 5V.

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Design of Full-Order Observer-based Sliding Mode Controller for Power System Stabilizer : Part I (전력계통안정기를 위한 전-차수 관측기에 기준한 슬라이딩 모드 제어기 설계 : Part I)

  • Lee, Sang-Seung;Park, Jong-Keun
    • Proceedings of the KIEE Conference
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    • 1997.07c
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    • pp.1156-1158
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    • 1997
  • This paper presents the proposed full-order observer-based sliding mode power system stabilizer(FOOSMPSS) for finding unmeasurable state variables(torque angle, quadratic-axis transient voltage, exciter output voltage, voltage regulator output voltage and output voltage) by measuring angular velocity. The simulation results is shown by the comparison of the FOOPSS with the proposed FOOSMPSS.

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Design of Full-Order Observer-based SM-MF Controller including CLF for Power System Stabilizer : Part 4 (전력계통안정기를 위한 폐-루우프 피이드백을 가진 전-차수 관측기에 기준한 SM-MF 제어기 설계 : Part4)

  • Lee, Sang-Seung;Park, Jong-Keun
    • Proceedings of the KIEE Conference
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    • 1997.07c
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    • pp.1171-1173
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    • 1997
  • This paper presents the sliding mode observer-model following(SMO-MF) power system stabilizer(PSS) for unmeasurable plant state variables. This SMO-MF PSS can be obtained by combining the sliding mode-model following(SM-MF) including closed-loop feedback(CLF) with the linear foil-order observer(LFOO).

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Compartion of the Novel Sliding Mode Controller with Virtual State to Sliding Mode Controller with Co-states (가상의 상태를 이용한 새로운 슬라이딩 모드 제어기와 기존의 co-state 기반의 슬라이딩 모드제어기 비교.검토)

  • Park, Seung-Kyu;Ha, Young-Suk;Gwak, Gun-Pyeong
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2664-2666
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    • 2000
  • In this paper, the novel sliding mode control method with virtual state is compared to the SMC with co-states. The former method is shown to have advantage in the respect of computation.

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Design and Implementation of High Power Source Measurement Unit (고 전력 Source Measurement Unit의 설계 및 제작)

  • Lee, Sang-Gu;Baek, Wang-Gi;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.860-863
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    • 2003
  • In this paper high power SMU(Source Measurement Unit) having 50V/1.5A source/measure range has been designed and implemented. The SMU has two operation mode, voltage mode and current mode. The SMU can be used as variable voltage source, variable current source, voltage meter, or current meter. Combining two different unit, output power can be doubled as 100V/1.5A. The developed SMU tan be used many semiconductor testing system and electronic device inspecting system.

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