• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.6
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• pp.287-290
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• 2006

A class-E CMOS RF(Radio frequency) power amplifier with a 1.8 Volt power supply is designed using $0.25{\mu}m$ standard CMOS technology. To drive the class-E power amplifier, a Class-F RF power amplifier is used and the reliability characteristics are studied with a class-E load network. After one year of operating the power amplifier with an RF choke, the PAE(Power Added Efficiency) decreases from 60% to 47% and the output power decreases 29%. However, when a finite DC-feed inductor is used with the load, the PAE decreases from 60% to 53% and the output power decreases only 19%. The simulated results demonstrate that the class-E power amplifier with a finite DC-feed inductor exhibits superior reliability characteristics.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.5
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• pp.99-104
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• 2011

This paper presents a high power and high efficiency unbalanced Doherty power amplifier used to extend the output power back-off (OPBO). The proposed unbalanced amplifier uses the same type of transistors in both the main amplifier and the peaking amplifier, similar to a conventional symmetric Doherty amplifier. The unbalanced amplifier can have the impedance of a ${\lambda}/4$ transformer located at the output of the main amplifier modified. This enables the OPBO to exceed 6 dB, the maximum OPBO for a conventional symmetric Doherty amplifier. The efficiency and linearity performance of the unbalanced Doherty amplifier are almost same as those found for the asymmetric Doherty amplifier, even though the unbalanced Doherty amplifier structure is simpler than the asymmetric Doherty structure. In order to verify the proposed amplifier performance, a 46 W Doherty amplifier has been both simulated and measured using a CDMA2000 1FA signal. From the measured results, the proposed unbalanced Doherty amplifier achieved an added power efficiency of 38 % and an adjacent channel power ratio of -34 dBc at a 885 kHz offset frequency and -35.6 dBc at a 1.98 MHz offset frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.12
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• pp.78-83
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• 2010

In this paper, a novel dual-band power amplifier using metamaterials has been realized with one RF GaN HEMT diffusion metal-oxide-semiconductor field effect transistor. The CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. We have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency. Two operating frequencies are chosen at 900 MHz and 2140 MHz in this work. The measured results show that the output power of 39.83 dBm and 35.17 dBm was obtained at 900 MHz and 2140 MHz, respectively. At this point, we have obtained the power-added efficiency (PAE) and IMD of 60.2 %, -23.17dBc and 67.3 %, -25.67dBc at two operation frequencies, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.80-85
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• 2010

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.942-943
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• 2008

The boost converter is usually used in power factor correction. The dynamic losses of its output diode are produced during the reverse recovery time. The power efficiency is decreased due to the losses and also it generates the noise. These disadvantages have been remarkably improved by ZCS and ZVS techniques of power factor improvement circuit. Some benefits lead to the achievement of higher power density and the development cost can be decreased. In this paper work, the reverse recovery suppression(RS) PFC method is used. A inductor and a diode are added into the conventional circuit. The switching device, MOSFET is turned off after the reverse recovery current has come to the zero level. The Zero Current Switching(ZCS) is implemented at that time. This power conversion technique improves the efficiency to about 1% and reduces the noise obviously. And the additional inductor can be designed using an original filter core in the circuit. The converter size is reduced effectively.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.399-404
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• 2014

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal was improved by designing an asymmetric Doherty PA (DPA). The linearity was improved by applying third-order inter-modulation (IM3) cancellation method. A small size is achieved by designing the DPA using GaN MMIC process. The implemented 2-stage DPA delivers a power-added efficiency (PAE) of 38.6% and a gain of 33.4 dB with an average power of 34.2 dBm for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.14 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.6 s.121
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• pp.584-590
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• 2007

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using PBG structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. PBG structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 34.64%, 6.65 dB compared with those of conventional Doherty amplifier, respectively.

• Journal of Power Electronics
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• v.15 no.1
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• pp.86-95
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• 2015

An active clamp high step-up boost converter with a coupled inductor is proposed in this paper. In the proposed strategy, a coupled inductor is adopted to achieve a high voltage gain. The clamp circuit is included to achieve the zero-voltage-switching (ZVS) condition for both the main and clamp switches. A rectifier composed of a capacitor and a diode is added to reduce the voltage stress of the output rectifier diode. As a result, diodes with a low reverse-recovery time and forward voltage-drop can be utilized. Since the voltage stresses of the main and clamp switches are far below the output voltage, low-voltage-rated MOSFETs can be adopted to reduce conduction losses. Moreover, the reverse-recovery losses of the diodes are reduced due to the inherent leakage inductance of the coupled inductor. Therefore, high efficiency can be expected. Firstly, the derivation of the proposed converter is given and the operation analysis is described. Then, a steady-state performance analysis of the proposed converter is analyzed in detail. Finally, a 250 W prototype is built to verify the analysis. The measured maximum efficiency of the prototype is 95%.

• Journal of Navigation and Port Research
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• v.26 no.3
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• pp.295-302
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• 2002

Currently digital communication system adapt various digital modulation schemes. All these communication systems are required to cause the minimum interference to adjacent channels, they must therefore employ the linear power amplifiers. In respect to linear power amplifiers, there are many linearization techniques. Feedforward power amplifier represent very wide bandwidth and high linearization capability. In the feedforward systems overall efficiency is reduced due to the loss of delay line. In this paper, delay filter instead of transmission delay line adapted to get more high efficiency. Experimental results showed that ACLR has improved 17.04dB which is added 2.54dB by using the delay filter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.681-689
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• 2010

We will demonstrate a novel topology for the feedforward amplifier. This amplifier does not use a delay element thus providing an efficiency enhancement and a size reduction by employing a distributed element negative group delay circuit. The insertion loss of the delay element in the conventional feedforward amplifier seriously degrades the efficiency. Usually, a high power co-axial cable or a delay line filter is utilized for a low loss, but the insertion loss, cost and size of the delay element still acts as a bottleneck. The proposed negative group delay circuit removes the necessity of the delay element required for a broadband signal suppression loop. With the fabricated 2-stage distributed element negative group delay circuit with -9 ns of total group delay, a 0.2 dB of insertion loss, and a 30 MHz of bandwidth for a wideband code division multiple access downlink band, the feedforward amplifier with the proposed topology experimentally achieved a 19.4 % power added efficiency and a -53.2 dBc adjacent channel leakage ratio with a 44 dBm average output power.