• 제목/요약/키워드: Post electrode

검색결과 148건 처리시간 0.025초

Improved Efficiency by Insertion of TiO2 Interfacial Layer in the Bilayer Solar Cells

  • Xie, Lin;Yoon, Soyeon;Kim, Kyungkon
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
    • /
    • pp.432.1-432.1
    • /
    • 2016
  • We demonstrated that the power conversion efficiency (PCE) of bilayer solar cell was significantly enhanced by inserting interfacial layer between the organic bilayer film and the Al electrode. Moreover, the water contact angle shows that the bilayer solar cells suffer from the undesirable surface component which limits the charge transport to the Al electrode. The AFM measurement has revealed that the pre- and post-thermal annealing treatments results in different morphologies of the interfacial layer which is critical for the higher PCE of the bilayer solar cells. Furthermore we have investigated the electrical properties of the bilayer solar cells and obtained insights into the detailed device mechanisms. The transient photovoltage measurements suggests that the significantly enhanced Voc is caused by reducing the recombination at the interface between the organic films and the Al electrode. By inserting the TiO2 layer between the bilayer film and Al electrode, the open circuit voltage (Voc) was increased from 0.37 to 0.66V. Consequently, the power conversion efficiency (PCE) of bilayer solar cells was significantly enhanced from 1.23% to 3.71%. As the results, the TiO2 interfacial layer can be used to form an ohmic contact layer, serveing as a blocking layer to prevent the penetration of the Al, and to reduce the recombination at the interface.

  • PDF

Structural Investigations of $RuO_2$ and Pt ad Films fir the Applications of memory Devices

  • S. M. Jung;Park, Y. S.;D. G. Lim;Park, Y.;J. Yi
    • 한국결정성장학회:학술대회논문집
    • /
    • 한국결정성장학회 1998년도 PROCEEDINGS OF THE 14TH KACG TECHNICAL MEETING AND THE 5TH KOREA-JAPAN EMGS (ELECTRONIC MATERIALS GROWTH SYMPOSIUM)
    • /
    • pp.57-60
    • /
    • 1998
  • Lean zirconate titanate (PZT) is an attractive material for the memory device applications. We have investigated Pt and{{{{ { RuO}_{2 } }}}} as a botton electrode for a device application of PZT thin film. The bottom electrodes were prepared by using an RF magnetron sputtering method. The substrate temperature influenced the resistivity of Pt and {{{{ { RuO}_{2 } }}}} a s well as the film crystal structure. XRD examination shows that a preferred(111) orientations for the substrate temperature of 30$0^{\circ}C$. From the XRD and AFM results, we recommend the substrate temperature of 30$0^{\circ}C$ for the bottom electrode growth. We investigated and anneal temperature effect because Perovskite PZT structure is recommended for the memory device applications and the structural transformation is occurred only after and elevated heat treatment. As post anneal temperature was increased from RT to $700^{\circ}C$, the resistivity of Rt and {{{{ { RuO}_{2 } }}}} w as decreased. Surface morphology was observed by AFM as a function of post anneal temperature.

  • PDF

방전가공에서 전기적 변화가 갖는 방전 특성에 관한 연구 (A Study for its Characteristics with Electric Variation in an Electrical Discharge Machining)

  • 신근하
    • 한국생산제조학회지
    • /
    • 제6권4호
    • /
    • pp.72-79
    • /
    • 1997
  • A study is a experiment which is figure out to optimum discharge cutting condition of the surface roughness, electronic discharging speed and electrode wear ration with Ton , Toff and V(voltage) as an input condition according to the current(Ip) in an electric spark machine : 1) Electrode is utilized Cu and Graphite. 2) Work piece is used the material of carbon steel. The condition of experiment is : 1) Current is varied 0.7(A) to 50(A) and the time of electric discharging to work piece in each time is 30(min) to 60(min). 2) After the upper side of work piece was measured in radius(5$\mu$m) of stylus analyzed the surface roughness to ade the table and graph of Rmax by yielding data. 3) Electro wear ratio is : \circled1Cooper was measured ex-machining and post-machining by the electronic balance. \circled2The ex-machining of graphite measured by it, the post-machining was found the data from volume $\times$specific gravity and analyzed to made its table and graph on ground the data. 4) In order to keep the accuracy of voltage affected to the work piece was equipped with the A.V. R and the memory scope was sticked to the electric spark machine. 5) In order to preserve the precision of current, to get rid of the noise occured by internal resistance of electric spark machine and to force injecting for the discharge fluid , it made the fixed table for a work piece to minimize the work error by means of one's failure during the electric discharging.

  • PDF

MOS 소자의 대체 게이트 산화막으로써 $HfO_{2}/HfSi_{x}O_{y}$ 의 구조 및 전기적 특성 분석 (Structural and electrical characterizations of $HfO_{2}/HfSi_{x}O_{y}$ as alternative gate dielectrics in MOS devices)

  • 강혁수;노용한
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
    • /
    • pp.45-49
    • /
    • 2001
  • We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

  • PDF

상업용 활성탄의 후처리에 의하여 제조된 전기이중층 커패시터용 전극재의 특성 (Performance of EDLC Electrodes Prepared by Post Treatments of Commercial Activated Carbon)

  • 우징유;홍익표;김명수
    • 한국응용과학기술학회지
    • /
    • 제30권2호
    • /
    • pp.362-370
    • /
    • 2013
  • Coconut shell 계 상용 활성탄을 후처리하여 EDLC 전극재로 적용하였다. Coconut shell계 활성탄을 별도의 처리없이 EDLC 전극재로 사용하였을 때, 초기 무게용량 및 부피용량은 66 F/g 및 39 F/cc이었고, 100 사이클 충 방전을 반복한 후, 각각 54 F/g 및 32 F/cc로 감소하여 82%의 충 방전효율을 나타내었다. 충 방전 반복에 따른 용량의 감소폭이 크며, CV 특성에서 부반응에 의한 분극현상이 발생하여 전극재로 적합하지 않았다. 상업용 활성탄에 포함된 불순물을 효율적으로 제거하기 위하여 알칼리 및 산 처리를 하였고, 그 후 세공 분포와 표면의 산성 관능기 함량을 제어하기 위하여 질소 분위기에서 열처리하였다. 알칼리 및 질산처리 한 후 $800^{\circ}C$에서 열처리한 전극재의 경우, 초기부피용량 44 F/cc, 100사이클 후 42 F/cc로서 실용화 가능한 수준의 높은 부피용량 및 95% 이상의 높은 충 방전 효율을 나타내었다.

강유전체 PZT를 이용한 반도체메모리소자에 관한 연구 (A Study of Semiconductor Memory Device using a Ferroelectric Material PZT)

  • 정세민;박영;최유신;임동건;송준태;이준신
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
    • /
    • pp.801-803
    • /
    • 1998
  • We investigated Pt and $RuO_2$ as a bottom electrode and PZT thin film for ferroelectric applications. XRD examination shows that a mixed phase of (111) and (200) Pt peak for the temperature ranged from RT to $200^{\circ}C$, and a preferred (111) orientation for the substrate temperature of $300^{\circ}C$. From the XRD and AFM results, we recommend the substrate temperature of $300^{\circ}C$, 80 W for the Pt bottom electrode growth. From the study of an oxygen partial pressure from 0 to 50%, we learned that only Ru metal was grown with $0{\sim}5%$, a mixed phase of Ru and $RuO_2$ for $10{\sim}40%$, pure $RuO_2$ at 50%. Having optimized the bottom electrode growth conditions, we employed two step process in PZT film capacitor: PZT film growth at the low substrate temperature of $300^{\circ}C$ and then post RTA anneal treatments. PZT films were randomly oriented on $RuO_2$ and (110) preferentially oriented on Pt electrode. Leakage current density of PZT film demonstrated two to three orders higher for $RuO_2$ bottom electrode. From C-V results we observed a dielectric constant of PZT film higher than 1200. This paper presents the optimized process conditions of the bottom electrodes and properties of PZT thin films on these electrodes.

  • PDF

Transparent Conducting Multilayer Electrode (GTO/Ag/GTO) Prepared by Radio-Frequency Sputtering for Organic Photovoltaic's Cells

  • Pandey, Rina;Kim, Jung Hyuk;Hwang, Do Kyung;Choi, Won Kook
    • 센서학회지
    • /
    • 제24권4호
    • /
    • pp.219-223
    • /
    • 2015
  • Indium free consisting of three alternating layers GTO/Ag/GTO has been fabricated by radio-frequency (RF) sputtering for the applications as transparent conducting electrodes and the structural, electrical and optical properties of the gallium tin oxide (GTO) films were carefully studied. The gallium tin oxide thin films deposited at room temperature are found to have an amorphous structure. Hall Effect measurements show a strong influence on the conductivity type where it changed from n-type to p-type at $700^{\circ}C$. GTO/Ag/GTO multilayer structured electrode with a few nm of Ag layer embedded is fabricated and show the optical transmittance of 86.48% in the visible range (${\lambda}$ = 380~770 nm) and quite low electrical resistivity of ${\sim}10^{-5}{\Omega}cm$. The resultant power conversion efficiency of 2.60% of the multilayer based OPV (GAG) is lower than that of the reference commercial ITO. GTO/Ag/GTO multilayer is a promising transparent conducting electrode material due to its low resistivity, high transmittance, low temperature deposition and low cost components.

구리수은막 전극에을 사용한 이소니아자이드의 전위차 역적정 (Potentiometric Back Titration of Isoniazid in Pharmaceutical Dosage Forms Using Copper Based Mercury Film Electrode)

  • Gajendiran, M.;Nazer, M.M. Abdul Kamal
    • 대한화학회지
    • /
    • 제55권4호
    • /
    • pp.620-625
    • /
    • 2011
  • 구리수은막 전극(CBMFE)으로 전위차 역적정함으로써 이소니아자이드(INH)를 정량하는 간단하고 빠른 방법이다. 순수한 형태와 투약형태에 대해서 1.0-10.0 mg 범위에서 정량 할 수 있도록 적정조건을 설정하였다. 방법의 정밀도와 정확도는 통계적인 방법으로 평가되었으며, 정제와 시럽속에 함유된 INH 정량법은 F-시험과 t-시험을 통하여 영국약전(BP) 방법과 비교하였다.

에어로졸 공정을 이용한 오산화바나듐(V2O5)-그래핀 복합체 제조 및 슈퍼커패시터 응용 (Preparation of V2O5-Graphene Composites using Aerosol Process for Supercapacitors Application)

  • 이총민;장희동
    • 한국입자에어로졸학회지
    • /
    • 제16권4호
    • /
    • pp.95-105
    • /
    • 2020
  • Vanadium Pentoxide (V2O5) has been emerged as alternative electrode materials for supercapacitors due to their low cost, natural abundance, and environmental friendliness. Graphene (GR) loaded with V2O5 can exhibit enhanced specific capacitance. In this study, we present three-dimensional (3D) crumpled graphene (CGR) decorated with V2O5. The V2O5-graphene composites were synthesized from a colloidal mixture of graphene oxide (GO) and Ammonium metavanadate (NH4VO3), via aerosol spray drying and post heat treatment process. The average size of composite was ranged from 1.82 to 4.6 ㎛. Morphology of the composite changed from a crumpled paper ball to spherical ball having relatively smooth surface as the content of V2O5 increased in the composites. The electrochemical performance of the V2O5-graphene composites was examined. The V2O5-graphene composite electrode showed the specific capacitance of 312 F/g. In addition, the device possessed acceptable cyclic stability, with 84% after 2000 cycles at 2 A/g. These outstanding properties are expected to make the composites prepared in this study as promising electrode materials for supercapacitor applications.

Electrode-Evaporation Method of III-nitride Vertical-type Single Chip LEDs

  • Kim, Kyoung Hwa;Ahn, Hyung Soo;Jeon, Injun;Cho, Chae Ryong;Jeon, Hunsoo;Yang, Min;Yi, Sam Nyung;Kim, Suck-Whan
    • Journal of the Korean Physical Society
    • /
    • 제73권9호
    • /
    • pp.1346-1350
    • /
    • 2018
  • An electrode-evaporation technology on both the top and bottom sides of the bare vertical-type single chip separated from the traditional substrate by cooling, was developed for III-nitride vertical-type single chip LEDs with thick GaN epilayer. The post-process of the cooling step was followed by sorting the bare vertical-type single chip LEDs into the holes in a pocket-type shadow mask for deposition of the electrodes at the top and bottom sides of bare vertical-type single chip LEDs without the traditional substrate for electrode evaporation technology for vertical-type single chip LEDs. The variation in size of the hole between the designed shadow mask and the deposited electrodes owing to the use of the designed pocket-type shadow mask is investigated. Furthermore, the electrical and the optical properties of bare vertical-type single chip LEDs deposited with two different shapes of n-type electrodes using the pocket-type shadow mask are investigated to explore the possibility of the e-beam evaporation method.