• Applied Microscopy
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• 제50권
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• pp.17.1-17.9
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• 2020

Recent advances in fabrication have enabled radial-junction architectures for cost-effective and high-performance optoelectronic devices. Unlike a planar PN junction, a radial-junction geometry maximizes the optical interaction in the three-dimensional (3D) structures, while effectively extracting the generated carriers via the conformal PN junction. In this paper, we report characterizations of radial PN junctions that consist of p-type Si micropillars created by deep reactive-ion etching (DRIE) and an n-type layer formed by phosphorus gas diffusion. We use electron-beam induced current (EBIC) microscopy to access the 3D junction profile from the sidewall of the pillars. Our EBIC images reveal uniform PN junctions conformally constructed on the 3D pillar array. Based on Monte-Carlo simulations and EBIC modeling, we estimate local carrier separation/collection efficiency that reflects the quality of the PN junction. We find the EBIC efficiency of the pillar array increases with the incident electron beam energy, consistent with the EBIC behaviors observed in a high-quality planar PN junction. The magnitude of the EBIC efficiency of our pillar array is about 70% at 10 kV, slightly lower than that of the planar device (≈ 81%). We suggest that this reduction could be attributed to the unpassivated pillar surface and the unintended recombination centers in the pillar cores introduced during the DRIE processes. Our results support that the depth-dependent EBIC approach is ideally suitable for evaluating PN junctions formed on micro/nanostructured semiconductors with various geometry.

• Journal of information and communication convergence engineering
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• 제9권6호
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• pp.721-724
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• 2011

Polymer base organic PN junction with various ion types was studied. Low-energy ion implantation technique(~keV) is very useful in physical doping on PPP(Polyparaphenylene) polymer. By double implantation, effective organic PN junction was achieved. The best obtained electrical I-V property was rectification ratio which was about 10000. However, still have problems in low junction current density.

• 한국진공학회지
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• 제19권5호
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• pp.391-396
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• 2010

실리콘 태양전지의 pn 접합 계면특성을 조사하기 위해서 p형 실리콘 기판 위에 전기로를 이용한 $POCl_3$ 공정을 통하여 n형의 불순물을 주입하여 pn 접합을 만들었다. n형 불순물의 확산되어 들어가는 공정시간이 길고 공정온도가 높을수록 면저항은 줄어들었다. n형 불순물의 주입이 많아질수록 pn 접합 계면에서의 전자친화도가 줄어들면서 면저항은 감소되었다. 면저항이 줄어든 이유는 pn 접합계면에서 전자홀쌍이 생성되면서 이동길이가 길어지고 재결합률이 감소하였기 때문이다. n형의 불순물 확산공정시간이 긴 태양전지 셀에서 F.F. 계수가 높게 나타났으며, 효율도 높게 나타났다.

• 반도체디스플레이기술학회지
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• 제16권2호
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• pp.39-43
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• 2017

It was confirmed that the silicon thin films fabricated on the p-Si (100) substrates by using DIPAS (DiIsoPropylAminoSilane) and TDMA-Sb (Tris-DiMethylAminoAntimony) sources by RPCVD method were amorphous and n-type silicon. The fabricated amorphous n-type silicon films had electron carrier concentrations and electron mobilities ranged from $6.83{\times}10^{18}cm^{-3}$ to $1.27{\times}10^{19}cm^{-3}$ and from 62 to $89cm^2/V{\cdot}s$, respectively. The ideality factor of the pn junction diode fabricated on the p-Si (100) substrate was about 1.19 and the efficiency of the fabricated pn solar cell was 10.87%.

• EDISON SW 활용 경진대회 논문집
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• 제5회(2016년)
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• pp.347-349
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• 2016

본 논문에서는 dopant density에 의존적인 pn junction의 breakdown 특성을 향상시키기 위하여, doping density와 doping profile에 대하여 분석했다. Doping density와 doping profile은 역방향 junction breakdown voltage를 결정하는 중요한 요소인 공핍영역의 두께와 공핍영역 내에 인가되는 electric field를 결정한다. Uniform doping profile과 Gaussian doping profile을 비교했고, 고전압 환경에서 사용할 수 있는 소자를 제작하는데 더욱 적절한 doping profile과 doping 농도에 대해 기술했다.

• 대한전자공학회논문지SD
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• 제41권9호
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• pp.1-9
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• 2004

III-V족 반도체 GaP GaAs 및 InP의 계단형 pn 접합에서의 항복전압을 위한 해석적 식을 유도하였다. 해석적 항복전압을 위해 각 물질에 대한 이온화계수 파라미터를 이용하여 유효 이온화계수를 추출하였고, 이의 이온화 적분을 통해 얻은 해석적 항복전압 결과는 수치적 결과 및 실험 결과와 10% 오차 범위 이내로 잘 일치하였다.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.109-112
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• 2007

In this paper we describe a robust method of improving precision in monitoring high energy ion implantation processes. Ion implant energy accuracy was measured in the device manufacturing process using an unpatterned implanted layer on an intrinsic p-type silicon wafer. To increase Rs sensitivity to energy at the well implant process, a PN junction structure was formed by P-well and deep N-well implants into the p-type Si wafer. It was observed that the depletion layer formed by the PN junction was very sensitive to energy variation of the well implant. Conclusively, it can be recommended to monitor well implant processes using the Rs measurement method described herein, i.e., a PN junction diode structure since it shows excellent Rs sensitivity to variation caused by energy difference at the well implant step.

• 방사선산업학회지
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• 제8권3호
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• pp.141-146
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• 2014

Nickel (Ni) electroplating was implemented by using a metal Ni powder in order to establish a $^{63}Ni$ plating condition on the PN junction semiconductor needed for production of beta-voltaic battery. PN junction semiconductors with a Ni seed layer of 500 and $1000{\AA}$ were coated with Ni at current density from 10 to $50mA\;cm^{-2}$. The surface roughness and average grain size of Ni deposits were investigated by XRD and SEM techniques. The roughness of Ni deposit was increased as the current density was increased, and decreased as the thickness of Ni seed layer was increased. The results showed that the optimum surface shape was obtained at a current density of $10mA\;cm^{-2}$ in seed layer with thickness of $500{\AA}$, $20mA\;cm^{-2}$ of $1000{\AA}$. Also, pure Ni deposit was well coated on a PN junction semiconductor without any oxide forms. Using the line width of (111) in XRD peak, the average grain size of the Ni thick firm was measured. The results showed that the average grain size was increased as the thickness of seed layer was increased.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.833-836
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• 2005

Nano-gap trench is fabricated by the novel electrochemical etching technique using forward biased PN junction formed at the backside of the wafer. PN junction is formed using boron nitride wafer and the concentration of the boron doping is the high value of $1{\times}10^{19}$ $cm^{-3}$. The electro-chemical etching is performed in the 5% HF solution under the forward bias voltage of $1{\sim}2V$. The relationship between the etch rate of the trench and the voltage of the forward bias is investigated and the dependence of the gap for the voltage also examined. The etch rate increase from 0.027 ${\mu}m/min$ to 0.031 ${\mu}m/min$ as the value of the applied voltage increase from 1V to 2V, but the the gap is kept constant value of 40 nm.

• 전자공학회논문지A
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• 제31A권12호
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• pp.100-105
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• 1994

SOI(Silicon-On-Insulator) pn 다이오드의 최적 수평길이($L_{dr}$)와 항복전압에 대한 해석적인 표현식을 n' 츠리프트 영역의 농도 및 두께, 매몰 산화막 두께의 함수로 유도하였다. 최적($L_{dr}$은 n'n접합의 수직 방향전계에 의한 항복전압과 n'np'접합으 수평방향 전계에 의한 항복전압이 같다는 조건으로부터 유도하였다. 해석적 표현식의 결과는 PISCESII를 사용한 시뮬레이션 결과와 잘 일치하였다.