Nano-gap Trench Etching using Forward Biased PN Junction for High Performance MEMS Devices

고성능 MEMS 소자를 위한 순방향 전극이 걸린 PN 접합을 이용한 나노 간격 홈의 식각

  • Jeong, Jin-Woo (School of Electrical Engineering and Computer Science, Seoul National University) ;
  • Kim, Hyeon-Cheol (School of Electrical Engineering and Computer Science, Seoul National University) ;
  • Chun, Kuk-Jin (School of Electrical Engineering and Computer Science, Seoul National University)
  • 정진우 (서울대학교 공과대학 전기컴퓨터 공학부) ;
  • 김현철 (서울대학교 공과대학 전기컴퓨터 공학부) ;
  • 전국진 (서울대학교 공과대학 전기컴퓨터 공학부)
  • Published : 2005.11.26

Abstract

Nano-gap trench is fabricated by the novel electrochemical etching technique using forward biased PN junction formed at the backside of the wafer. PN junction is formed using boron nitride wafer and the concentration of the boron doping is the high value of $1{\times}10^{19}$ $cm^{-3}$. The electro-chemical etching is performed in the 5% HF solution under the forward bias voltage of $1{\sim}2V$. The relationship between the etch rate of the trench and the voltage of the forward bias is investigated and the dependence of the gap for the voltage also examined. The etch rate increase from 0.027 ${\mu}m/min$ to 0.031 ${\mu}m/min$ as the value of the applied voltage increase from 1V to 2V, but the the gap is kept constant value of 40 nm.

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