• Title/Summary/Keyword: Phase Bias

Search Result 332, Processing Time 0.032 seconds

Phase Bias Independent Fade-free Optical Fiber Interferometric Vibration Sensor

  • Youngwoong Kim;Jongyeol Kim;Younggwan Hwang;Gukbeen Ryu;Young Ho Kim;Myoung Jin Kim
    • Current Optics and Photonics
    • /
    • v.8 no.5
    • /
    • pp.456-462
    • /
    • 2024
  • We propose a novel fade-free optical fiber interferometric vibration sensor using a simple setup with a 90° optical hybrid. The interferometer consists of all-optical components without the phase modulators and complex demodulation processes that were previously used to compensate for signal fading induced by phase bias change. Fade-free output was successfully obtained by in-phase and quadrature detection with a π/2 phase shifting scheme. Theoretical analysis and measurement results showed that the proposed interferometric vibration sensor operates independently of the phase bias state of interfering waves.

Effects of Phase Difference between Voltage loaves Applied to Primary and Secondary Electrodes in Dual Radio Frequency Plasma Chamber

  • Kim, Heon-Chang
    • Journal of the Semiconductor & Display Technology
    • /
    • v.4 no.2 s.11
    • /
    • pp.11-14
    • /
    • 2005
  • In plasma processing reactors, it is common practice to control plasma density and ion bombardment energy by manipulating excitation voltage and frequency. In this paper, a dually excited capacitively coupled rf plasma reactor is self-consistently simulated with a three moment model. Effects of phase differences between primary and secondary voltage waves, simultaneously modulated at various combinations of commensurate frequencies, on plasma properties are investigated. The simulation results show that plasma potential and density as well as primary self-dc bias are nearly unaffected by the phase lag between the primary and the secondary voltage waves. The results also show that, with the secondary frequency substantially lower than the primary frequency, secondary self·do bias remains constant regardless of the phase lag. As the secondary frequency approaches to the primary frequency, however, the secondary self-dc bias becomes greatly altered by the phase lag, and so does the ion bombardment energy at the secondary electrode. These results demonstrate that ion bombardment energy can be more carefully controlled through plasma simulation.

  • PDF

A Study on the Low Temperature Epitaxial Growth of $CoSi_2$ Layer by Multitarget Bias cosputter Deposition and Phase Sequence (Multitarget Bias Cosputter증착에 의한 $CoSi_2$층의 저온정합성장 및 상전이에 관한 연구)

  • Park, Sang-Uk;Choe, Jeong-Dong;Gwak, Jun-Seop;Ji, Eung-Jun;Baek, Hong-Gu
    • Korean Journal of Materials Research
    • /
    • v.4 no.1
    • /
    • pp.9-23
    • /
    • 1994
  • Epitaxial $CoSi_2$ layer has been grown on NaCl(100) substrate at low deposition temperature($200^{\circ}C$) by multitarget bias cosputter deposition(MBCD). The phase sequence and crystallinity of deposited silicide as a function of deposition temperature and substrate bias voltage were studied by X-ray diffraction(XRD) and transmission electron microscopy(TEM) analysis. Crystalline Si was grown at $200^{\circ}C$ by metal induced crystallization(M1C) and self bias effect. In addition to, the MIC was analyzed both theoretically and experimentally. The observed phase sequence was $Co_2Si \to CoSi \to Cosi_2$ and was in good agreement with that predicted by effective heat of formation rule. The phase sequence, the CoSi(l11) preferred orientation, and the crystallinity had stronger dependence on the substrate bias voltage than the deposition temperature due to the collisional cascade mixing, the in-situ cleaning, and the increase in the number of nucleation sites by ion bombardment of growing surface. Grain growth induced by ion bombardment was observed with increasing substrate bias voltage at $200^{\circ}C$ and was interpreted with ion bombardment dissociation model. The parameters of $E_{Ar}\;and \alpha(V_s)$ were chosen to properly quantify the ion bombardment effect on the variation in crystallinty at $200^{\circ}C$ with increasing substrate bias voltage using Langmuir probe.

  • PDF

A Novel Passive Converter for Improving Drive Characteristics of a Single Phase SRM (단상 SRM의 운전 특성 개선을 위한 새로운 패시브 컨버터)

  • Lee, Dong-Hee;Liang, Jianing;Ahn, Jin-Woo
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.58 no.8
    • /
    • pp.1519-1525
    • /
    • 2009
  • This paper presents a novel passive converter for single phase SRM. The proposed passive converter has additional passive power circuit which is consisted by three diodes and one capacitor in the front-end of conventional asymmetric converter to supply a high negative bias during demagnetization. The high negative bias can reduce the demagnetization time and negative torque from tail current in single phase SRM. So, It can extend positive torque region by the extended turn-off position. In this paper, the structure and operating modes of a novel passive converter are introduced with mathematical model. The proposed single phase SRM using passive converter is verified by the computer simulation and experimental results.

Low Phase Noise LC-VCO with Active Source Degeneration

  • Nguyen, D.B. Yen;Ko, Young-Hun;Yun, Seok-Ju;Han, Seok-Kyun;Lee, Sang-Gug
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.13 no.3
    • /
    • pp.207-212
    • /
    • 2013
  • A new CMOS voltage-bias differential LC voltage-controlled oscillator (LC-VCO) with active source degeneration is proposed. The proposed degeneration technique preserves the quality factor of the LC-tank which leads to improvement in phase noise of VCO oscillators. The proposed VCO shows the high figure of merit (FOM) with large tuning range, low power, and small chip size compared to those of conventional voltage-bias differential LC-VCO. The proposed VCO implemented in 0.18-${\mu}m$ CMOS shows the phase noise of -118 dBc/Hz at 1 MHz offset oscillating at 5.03 GHz, tuning range of 12%, occupies 0.15 $mm^2$ of chip area while dissipating 1.44 mW from 0.8 V supply.

Simulation of a Dually Excited Capacitively Coupled RF Plasma

  • Kim, Heon-Chang;Sul, Yong-Tae;Park, Sung-Jin
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2005.07a
    • /
    • pp.513-514
    • /
    • 2005
  • In plasma processing reactors, it is common practice to control plasma density and ion bombardment energy by manipulating excitation voltage and frequency. In this paper, a dually excited capacitively coupled rf plasma reactor is self-consistently simulated with a three moment model. Effects of phase differences between primary and secondary voltage waves, simultaneously modulated at various combination of commensurate frequencies, on plasma properties are investigated. The simulation results show that plasma potential and density as well as primary self-dc bias are nearly unaffected by the phase lag between the primary and the secondary voltage waves. The results also show that, with the secondary frequency substantially lower than the primary frequency, secondary self-dc bias remains constant regardless of the phase lag. As the secondary frequency approaches to the primary frequency, however, the secondary self-dc bias becomes greatly altered by the phase lag, and so does the ion bombardment energy at the secondary electrode. These results demonstrate that ion bombardment energy can be more carefully controlled through plasma simulation.

  • PDF

Design of the Shottky Diode Linearizer using a Bias Point (바이어스 동작점을 이용한 쇼트키 다이오드 선형화기 설계)

  • Do, Dae-Joo;Lee, Won-Hui;Hur, Jung;Lee, Jong-Arc
    • Proceedings of the IEEK Conference
    • /
    • 2001.06a
    • /
    • pp.393-396
    • /
    • 2001
  • In this paper, a new type of linearizer using a parallel diode with a bias feed resistance has been studied. It has positive gain and negative phase deviations because of a nonlinearity of the diode and movement of bias point cause by a voltage drop at the bias feed resistance. This predistortion linearizer consists of the little component and miniaturizes circuit design. The characteristics of this linearizer can be easily tuned using input bias voltage. In fabricated linearizer, maximum gain and Phase deviation of the linearizer is 1dB, 21$^{\circ}$ respectively. By applying its characteristics to the power amplifier, it will be linearized power amplifier.

  • PDF

Single Phase SRM Converter with Boost Negative Bias (부스트 Negative Bias를 가지는 단상 SRM 컨버터)

  • Liang, Jianing;Seok, Seung-Hun;Lee, Dong-Hee;Ahn, Jin-Woo
    • Proceedings of the KIEE Conference
    • /
    • 2008.07a
    • /
    • pp.879-880
    • /
    • 2008
  • At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

  • PDF

Characteristics on Boundary Layer and Formation Mechanism of c-BN Thin Films During Electron Assisted Hot Filament CVD Process (EAHFCVD법에 의한 c-BN 박막형성기구와 계면층의 특성에 관하여)

  • Choi, Yong;Choe, Jean-I.
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.61 no.1
    • /
    • pp.89-93
    • /
    • 2012
  • c-BN films were deposited on SKH-51 steels by electron assisted hot filament CVD method and microstructure development was studied processing parameters such as bias voltage, temperature, etching and phase transformation at boundary layer between BN compound and steel to develop a high performance wear resistance tools. A negative bias voltage higher than 200V at substrate temperature of $800^{\circ}C$ and gas pressure of 20 torr in B2H6-NH3-H2 gas system was one of optimum conditions to produce c-BN films on the SKH-51 steels. Thin layer of hexagonal boron nitride phase was observed at the interface between c-BN layer and substrate.

Design and Fabrication of Distributed Analog Phase Shifter Using Ferroelectric (Ba,Sr)TiO$_3$ Thin Films (강유전체 (Ba,Sr)TiO$_3$ 박막을 이용한 분포 정수형 아날로그 위상변위기 설계 및 제작)

  • 류한철;김영태;문승언;곽민환;이수재
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
    • /
    • 2002.11a
    • /
    • pp.370-374
    • /
    • 2002
  • This paper describes the design and fabrication of distributed analog phase shifter circuit. The phase shifter consist of coplanar waveguide(CPW) lines that are periodically loaded with voltage tunable (Ba,Sr)TiO$_3$ thin film interdigital(IDT) capacitors deposited by the pulsed laser deposition(PLD) on (001) MgO single crystals. The phase velocity on these IDT loaded CPW lines is a function of applied bias voltage, thus resulting in analog phase shifting circuits. The measured differential phase shift is 48$^{\circ}$ and the insertion loss decreases from -5㏈ to -3㏈ with increasing bias voltage from 0 to 40 V at 100㎐.

  • PDF