• 제목/요약/키워드: Patterned electrode

검색결과 137건 처리시간 0.029초

미세접촉프린팅 공정을 이용한 유연성 유기박막소자(OTFT)설계 및 제작 (Design and Fabrication of Flexible OTFTs by using Nanocantact Printing Process)

  • 조정대;김광영;이응숙;최병오
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.506-508
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    • 2005
  • In general, organic TFTs are comprised of four components: gate electrode, gate dielectric, organic active semiconductor layer, and source and drain contacts. The TFT current, in turn, is typically determined by channel length and width, carrier field effect mobility, gate dielectric thickness and permittivity, contact resistance, and biasing conditions. More recently, a number of techniques and processes have been introduced to the fabrication of OTFT circuits and displays that aim specifically at reduced fabrication cost. These include microcontact printing for the patterning of metals and dielectrics, the use of photochemically patterned insulating and conducting films, and inkjet printing for the selective deposition of contacts and interconnect pattern. In the fabrication of organic TFTs, microcontact printing has been used to pattern gate electrodes, gate dielectrics, and source and drain contacts with sufficient yield to allow the fabrication of transistors. We were fabricated a pentacene OTFTs on flexible PEN film. Au/Cr was used for the gate electrode, parylene-c was deposited as the gate dielectric, and Au/Cr was chosen for the source and drain contacts; were all deposited by ion-beam sputtering and patterned by microcontact printing and lift-off process. Prior to the deposition of the organic active layer, the gate dielectric surface was treated with octadecyltrichlorosilane(OTS) from the vapor phase. To complete the device, pentacene was deposited by thermal evaporation and patterned using a parylene-c layer. The device was shown that the carrier field effect mobility, the threshold voltage, the subthreshold slope, and the on/off current ratio were improved.

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미세 패턴화된 리튬금속 전극의 Vinylene Carbonate 첨가제 도입에 따른 전기화학 특성에 관한 연구 (Effect of Vinylene Carbonate as an Electrolyte Additive on the Electrochemical Properties of Micro-Patterned Lithium Metal Anode)

  • 진다희;박주남;;윤별희;유명현;이용민
    • 전기화학회지
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    • 제22권2호
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    • pp.69-78
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    • 2019
  • 리튬 금속 음극은 낮은 환원 전위, 고에너지 밀도로 인해 흑연을 대체할 차세대 음극재로 재조명 받고 있다. 하지만, 충방전시 리튬 금속 표면에서의 반복적인 산화/환원 반응에 의해 리튬 덴드라이트가 형성되며 이로 인해 수명특성이 급격하게 저하되고 더 나아가 내부 단락(Internal Short-circuit)과 같은 안전성 문제로 인해 상용화되기에는 어려운 실정이다. 이를 해결하기 위해 본 연구 그룹에서는 리튬 금속에 미세 패턴을 형성하여 전류 밀도를 제어함으로써 덴드라이트 형성을 제어하였으나, 고전류밀도에서는 리튬 덴드라이트의 형성을 완벽하게 제어할 수는 없었다. 본 연구에서는 미세 패턴화된 리튬 금속 전극에 전해질 첨가제 Vinylene Carbonate(VC)를 도입하여 고율 충방전 시 미세 패턴화된 리튬 금속 전극의 덴드라이트 형성 억제를 극대화하고자 하였다. 미세 패턴화된 리튬 금속 전극과 VC 첨가제의 시너지 효과로 인해 높은 전류 밀도에서의 리튬 덴드라이트가 비교적 치밀하게 형성되는 것을 확인할 수 있었다. 이로 인해 300사이클 동안 88.3%의 용량유지율을 보였으며, 기존의 미세 패턴화된 리튬 금속 전극에 대비하여 수명특성이 약 6배 이상 향상된 것을 확인할 수 있었다.

가열롤 임프린팅 방법을 이용한 유연 유기태양전지용 Ag 그리드 패턴 PET 기판 제작 (Fabrication of Ag Grid Patterned PET Substrates by Thermal Roll-Imprinting for Flexible Organic Solar Cells)

  • 조정민;조정대;김태일;김동수
    • 한국정밀공학회지
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    • 제31권11호
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    • pp.993-998
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    • 2014
  • Silver (Ag) grid patterned PET substrates were manufactured by thermal roll-imprinting methods. We coated highly conductive layer (HCL) as a supply electrode on the Ag grid patterned PET in the three kinds of conditions. One was no-HCL without conductive PEDOT:PSS on the Ag grid patterned PET substrate, another was thin-HCL coated with ~50 nm thickness of conductive PEDOT:PSS on the Ag grid PET, and the other was thick-HCL coated with ~95 nm thickness of conductive PEDOT:PSS. These three HCLs in order showed 73.8%, 71.9%, and 64.7% each in transmittance, while indicating $3.84{\Omega}/{\Box}$, $3.29{\Omega}/{\Box}$, and $2.65{\Omega}/{\Box}$ each in sheet resistance. Fabrication of organic solar cells (OSCs) with HCL Ag grid patterned PET substrates showed high power conversion efficiency (PCE) on the thin-HCL device. The thick-HCL device decreased efficiency due to low open circuit voltage ($V_{OC}$). And the Ag grid pattern device without HCL had the lowest energy efficiency caused by quite low short current density ($J_{SC}$).

패드 인쇄 기법을 이용하여 곡면상에 구현된 PEMS 디바이스 (Pad Printed PEMS Device Printed on a Curved Surface)

  • 이택민;최현철;노재호;김동수
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2008년도 추계학술대회A
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    • pp.1087-1090
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    • 2008
  • This paper presents the electro-luminescence (EL) display lamp which is patterned on a curved surface by the pad printing method. The printing methods, including the gravure, screen, flexo, inkjet, and pad printing, have an advantage of one-step direct patterning. However, in general, the printing and semi-conductor process, except pad printing method, cannot be applied for patterning on a curved surface. Thus, in this paper, we used pad printing method for patterning an EL display lamp on a curved surface. The EL display lamp consists of 5 layers: Bottom electrode; Dielectric layer; Phosphor; Transparent electrode; Bus electrode. Finally, we printed EL display lamp on a dish, which has a radius of curvature 80mm. The EL display lamp was driven at AC 200V of 1kHz.

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대전입자형 디스플레이의 전기 및 광학특성 분석 (Electrical and Optical Analysis of Charged Particle type Display)

  • 김백현;김성운;황인성;김처주;김영조
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.66-67
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    • 2007
  • We have developed reflective information display using opposite-charged two particles. An appropriate amount of both the yellow and the black powers are putted between the ITO patterned glass substrate separated with cell gap. The rib maintains the cell gap and prevents the interference between the pixels. When a negative voltage is applied to the upper ITO electrode, the positively charged black powder moves to the upper electrode viewing a black appearance. In case of positive voltage is applied to this electrode white particle is observed. So we analyzed the electrical and optical properties of our charged particle type display panel.

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박막트랜지스터의 습식 및 건식 식각 공정 (The Wet and Dry Etching Process of Thin Film Transistor)

  • 박춘식;허창우
    • 한국정보통신학회논문지
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    • 제13권7호
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    • pp.1393-1398
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    • 2009
  • 본 연구는 LCD용 비정질 실리콘박막트랜지스터의 제조공정중 가장 중요한 식각 공정에서 각 박막의 특성에 맞는 습식 및 건식식각공정을 개발하여 소자의 특성을 안정시키고자 한다. 본 연구의 수소화 된 비정질 실리콘 박막 트랜지스터는 Inverted Staggered 형태로 게이트 전극이 하부에 있다. 실험 방법은 게이트전극, 절연층, 전도층, 에치스토퍼 및 포토레지스터층을 연속 증착한다. 스토퍼층을 게이트 전극의 패턴으로 남기고, 그 위에 n+a-Si:H 층 및 NPR(Negative Photo Resister)을 형성시킨다. 상부 게이트 전극과 반대의 패턴으로 NPR층을 패터닝하여 그것을 마스크로 상부 n+a-Si:H 층을 식각하고, 남아있는 NPR층을 제거 한다. 그 위 에 Cr층을 증착한 후 패터닝 하여 소오스-드레인 전극을 위한 Cr층을 형성시켜 박막 트랜지스터를 제조한다. 여기서 각 박막의 패터닝은 식각 공정으로 각단위 박막의 특성에 맞는 건식 및 습식식각 공정이 필요하다. 제조한 박막 트랜지스터에서 가장 흔히 발생되는 문제는 주로 식각 공정시 over 및 under etching 이며, 정확한 식각을 위하여 각 박막에 맞는 식각공정을 개발하여 소자의 최적 특성을 제공하고자한다. 이와 같이 공정에 보다 엄격한 기준의 건식 및 습식식각 공정 그리고 세척 등의 처리공정을 정밀하게 실시하여 소자의 특성을 확실히 개선 할 수 있었다.

전극구조 개선을 통한 PVA 셀의 광학특성 향상방안 (Improvement of optical properties in patterned vertical alignment mode with modified electrodes structure)

  • 김혜영;김우일;김대현;권동원;임세현;이승희;정연학;류재진;김경현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.172-172
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    • 2010
  • The Patterned vertical alignment (PVA) mode has many advantages such as perfect dark state at the normal direction and wide viewing angle. However, PVA mode needs additional process to pattern electrodes of both substrates and complicated assembly process. Moreover, this mode shows slow response time. To overcome these problems, we use plane shape ITO on top substrate instead of patterned electrode and form proper tilt angle of LC director on the surface while maintaining these original merits. Consequently, we achieve fast response time and improve transmittance.

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A New Inspection Method of PDP Electrode Pattern Defects

  • Kim, Taehong;Sunkyu Yang;Tak Eun;Park, Sehwa;Ilhong Suh
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.457-457
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    • 2000
  • The display module of PDP consists of a pair of fine electrode patterned panels. For example, in case of 42" PDP, thousands of electrode patterns should be placed on panel, where length, width, and height of each pattern m one meter, 50${\mu}{\textrm}{m}$, and 30${\mu}{\textrm}{m}$ respectively. And pitch between patterns is around 200${\mu}{\textrm}{m}$. Electrode patterns are frequently damaged during the production process, and thus might be broken. These breakage will result in open-circuited electrical characteristic of a pattern and/or open-circuited electrical characteristic between patterns. Therefore, inspection of pattern defects is the inevitable process to improve production yield rate of the panel. In this paper, we first review several types of PDP pattern defects which affects yield-rate of PDP. And, problems of inspecting such pattern defects by a typical inspection method is addressed. Then, a novel inspection method is proposed to overcome the difficulties, where some new components and the algorithm to detect the electrode defects are explored.ored.

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A Single Cell Gap Transflective LCD in a Patterned Vertically Aligned Mode

  • Lee, You-Jin;Lee, Tae-Hee;Kim, Hak-Rin;Choi, Yoon-Seuk;Kim, Jae-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.743-746
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    • 2006
  • We have demonstrated a transflective liquid crystal display (LCD) with a single cell gap in a patterned vertically aligned mode. In our configuration, the different electrode structure in a transmissive and a reflective part was suggested to compensate an optical path difference of each region. As the result, the similar electro-optic characteristic of each region was obtained which results in an enhanced performance of the device. Moreover, suggested technique can be highly effective to realize the practical transflective LCD due to the simple fabrication process.

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Electrical properties of Organic TFT patterned by shadow-mask with all layer

  • 이주원;김재경;장진;주병권
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.543-544
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    • 2006
  • Pentacene thin film transistors fabricated without photolithographic patterning were fabricated on the plastic substrates. Both the organic/inorganic thin films and metallic electrode were patterned by shifting the position of the shadow mask which accompanies the substrate throughout the deposition process. By using an optically transparent zirconium oxide ($ZrO_2$) as a gate insulator and octadecyltrimethoxysilane (OTMS) as an organic molecule for self-assembled monolayer (SAM) to increase the adhesion between the plastic substrate and gate insulator and the mobility with surface treatment, high-performance transistor with field effect mobility $.66\;cm^2$/V s and $I_{on}/I_{off}$>$10^5$ was formed on the plastic substrate. This technique will be applicable to all structure deposited at low temperature and suitable for an easy process for flexible display.

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