• Title/Summary/Keyword: Parallel Signature Analysis

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A Study on the Test Strategy of Digital Circuit Board in the Production Line Based on Parallel Signature Analysis Technique (PSA 기법에 근거한 생산라인상의 디지털 회로 보오드 검사전략에 대한 연구)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.11
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    • pp.768-775
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    • 2004
  • The SSA technique in the digital circuit test is required to be repeated the input pattern stream to n bits output nodes n times in case of using a multiplexor. Because the method adopting a parallel/serial bit convertor to remove this inefficiency has disadvantage of requiring the test time n times for a pattern, the test strategy is required, which can enhance the test productivity by reducing the test time based on simplified fault detection mechanism. Accordingly, this paper proposes a test strategy which enhances the test productivity and efficiency by appling PAS (Parallel Signature Analysis) technique to those after analyzing the structure and characteristics of the digital devices including TTL and CMOS family ICs as well as ROM and RAM. The PSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Resister) representing the characteristic equation. Also, the method to obtain the optimal signature analyzer is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.

A Study on Sound Quality of Exhaust Tail-pipe Noise of Vehicle (차량 배기토출음 음질분석에 대한 연구)

  • Jung, In Sung;Kim, Hong Ki;Shin, Dong Ho;Lim, Hee Gon;Kim, Sang Ho
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.25 no.2
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    • pp.90-100
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    • 2015
  • Recently, creating a signature sound for a brand has become more important in the automotive industry. It is important to remember that the people inside a vehicle are not the only one, who assess the signature sound, exhaust sound has become a more important factor. Most research has used psycho-acoustic parameter to objectively measure the aesthetic qualities of exhaust sound. However, these results do not parallel the results from subjective analysis. Therefore, this research focused on developing a method for objective quantification to assess the aesthetic qualities of exhaust sound in order to help develop a more appealing signature sound. To do so, the actual exhaust sound was synthesized and subjectively assessed at varied frequencies samples of 30 individuals employed at sejong R&D center. The results were analyzed using the science of harmony scale.

Hardware Implementation of Elliptic Curve Scalar Multiplier over GF(2n) with Simple Power Analysis Countermeasure (SPA 대응 기법을 적용한 이진체 위의 타원곡선 스칼라곱셈기의 하드웨어 구현)

  • 김현익;정석원;윤중철
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.9
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    • pp.73-84
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    • 2004
  • This paper suggests a new scalar multiplication algerian to resist SPA which threatens the security of cryptographic primitive on the hardware recently, and discusses how to apply this algerian Our algorithm is better than other SPA countermeasure algorithms aspect to computational efficiency. Since known SPA countermeasure algorithms have dependency of computation. these are difficult to construct parallel architecture efficiently. To solve this problem our algorithm removes dependency and computes a multiplication and a squaring during inversion with parallel architecture in order to minimize loss of performance. We implement hardware logic with VHDL(VHSIC Hardware Description Language) to verify performance. Synthesis tool is Synplify Pro 7.0 and target chip is Xillinx VirtexE XCV2000EFGl156. Total equivalent gate is 60,508 and maximum frequency is 30Mhz. Our scalar multiplier can be applied to digital signature, encryption and decryption, key exchange, etc. It is applied to a embedded-micom it protects SPA and provides efficient computation.

A Malware Variants Detection Method based on Behavior Similarity (행위 유사도 기반 변종 악성코드 탐지 방법)

  • Joe, Woo-Jin;Kim, Hyong-Shik
    • Smart Media Journal
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    • v.8 no.4
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    • pp.25-32
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    • 2019
  • While the development of the Internet has made information more accessible, this also has provided a variety of intrusion paths for malicious programs. Traditional Signature-based malware-detectors cannot identify new malware. Although Dynamic Analysis may analyze new malware that the Signature cannot do, it still is inefficient for detecting variants while most of the behaviors are similar. In this paper, we propose a detection method using behavioral similarity with existing malicious codes, assuming that they have parallel patterns. The proposed method is to extract the behavior targets common to variants and detect programs that have similar targets. Here, we verified behavioral similarities between variants through the conducted experiments with 1,000 malicious codes.

Design of a Rule-Based Solution Based on MFC for Inspection of the Hybrid Electronic Circuit Board (MFC 기반 하이브리드 전자보오드 검사를 위한 규칙기반 솔루션 설계)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.9
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    • pp.531-538
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    • 2005
  • This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

Fault Diagnosis System for Traction Motor in Electric Multiple Unit (전동차 견인전동기 고장진단시스템)

  • Park, Hyun-June;Jang, Dong-Uk;Lee, Gil-Hun;Choi, Jong-Sun;Kim, Jung-Soo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.518-521
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    • 2003
  • A new measurement system was developed by fault diagnosis system for traction motor using current signal analysis. The motor current signature analysis method is used for traction motor fault diagnosis. The diagnosis system program is constructed by artificial neural networks algorithm, those results from the program are used to train neural networks. The trained neural networks have the ability to compute adaptive results for non-trained inputs, and to calculate very fast due to original parallel structure of neural networks with high accuracy within destined tolerance. This system suggested that available test for checking, the probable extent of aging, and the rate of which aging is taking place.

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Comparison between Possibilistic c-Means (PCM) and Artificial Neural Network (ANN) Classification Algorithms in Land use/ Land cover Classification

  • Ganbold, Ganchimeg;Chasia, Stanley
    • International Journal of Knowledge Content Development & Technology
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    • v.7 no.1
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    • pp.57-78
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    • 2017
  • There are several statistical classification algorithms available for land use/land cover classification. However, each has a certain bias or compromise. Some methods like the parallel piped approach in supervised classification, cannot classify continuous regions within a feature. On the other hand, while unsupervised classification method takes maximum advantage of spectral variability in an image, the maximally separable clusters in spectral space may not do much for our perception of important classes in a given study area. In this research, the output of an ANN algorithm was compared with the Possibilistic c-Means an improvement of the fuzzy c-Means on both moderate resolutions Landsat8 and a high resolution Formosat 2 images. The Formosat 2 image comes with an 8m spectral resolution on the multispectral data. This multispectral image data was resampled to 10m in order to maintain a uniform ratio of 1:3 against Landsat 8 image. Six classes were chosen for analysis including: Dense forest, eucalyptus, water, grassland, wheat and riverine sand. Using a standard false color composite (FCC), the six features reflected differently in the infrared region with wheat producing the brightest pixel values. Signature collection per class was therefore easily obtained for all classifications. The output of both ANN and FCM, were analyzed separately for accuracy and an error matrix generated to assess the quality and accuracy of the classification algorithms. When you compare the results of the two methods on a per-class-basis, ANN had a crisper output compared to PCM which yielded clusters with pixels especially on the moderate resolution Landsat 8 imagery.