• 제목/요약/키워드: Paper chip

검색결과 3,327건 처리시간 0.033초

플립 칩 본딩으로 패키징한 레이저 다이오우드 어레이의 열적 특성 변화 분석 (Analysis of thermal characteristic variations in LD arrays packaged by flip-chip solder-bump bonding technique)

  • 서종화;정종민;지윤규
    • 전자공학회논문지A
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    • 제33A권3호
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    • pp.140-151
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    • 1996
  • In this paper, we analyze the variations of thermal characteristics of LD (laser diode) arrays packaged by a flip-chip bonding method. When we simulate the temperature distribution in LD arrays with a BEM (boundary element method) program coded in this paper, we find that thermal crosstalks in LD arrays packaged by the flip-chip bonding method increases by 250-340% compared to that in LD arrays packaged by previous methods. In the LD array module packaged by the flip-chip bonding technique without TEC (thermo-electric cooler), the important parameter is the absolute temperature of the active layer increased due cooler), the important parameter is the absolute temperature of th eactiv elayers of LD arrays to thermal crosstalk. And we find that the temperature of the active layers of LD arrays increases up to 125$^{\circ}C$ whenall four LDs, without a carefully designed heatsink, are turned on, assuming the power consumption of 100mW from each LD. In order to reduce thermal crosstalk we propose a heatsink sturcture which can decrease the temeprature at the active layer by 40%.

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온칩 시동회로를 갖는 CMOS DC-DC 벅 변환기 설계 (Design of monolithic DC-DC Buck converter with on chip soft-start circuit)

  • 박승찬;임동균;이상민;윤광섭
    • 한국통신학회논문지
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    • 제34권7A호
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    • pp.568-573
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    • 2009
  • 본 논문에서 0.13um CMOS 공정으로 설계된 배터리 기반 휴대용 통신 시스템 구동용의 온칩 시동회로를 갖는 스텝다운 CMOS DC-DC 변환기를 제안하였다. 1MHz의 스위칭 주파수를 기반으로 설계된 벅 변환기에는 온칩 시동회로와 커패시터 멀티플라이어 기법을 이용한 보상회로를 포함시켰다. 칩 측정 결과 2.5V ${\sim}$3.3V의 입력 전압을 1.2V로 강압시키는데 최대 87.2%의 효율을 갖는다. 최대 부하 전류, 출력 전류 리플 및 전압 리플은 각각 500mA, 25mA, 24mV 이다.

결함검출을 위한 실험적 연구

  • 목종수
    • 한국공작기계학회:학술대회논문집
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    • 한국공작기계학회 1996년도 춘계학술대회 논문집
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    • pp.24-29
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    • 1996
  • The seniconductor, which is precision product, requires many inspection processes. The surface conditions of the semiconductor chip effect on the functions of the semiconductors. The defects of the chip surface is crack or void. Because general inspection method requires many inspection processes, the inspection system which searches immediately and preciselythe defects of the semiconductor chip surface. We propose the inspection method by using the computer vision system. This study presents an image processing algorithm for inspecting the surface defects(crack, void)of the semiconductor test samples. The proposed image processing algorithm aims to reduce inspection time, and to analyze those experienced operator. This paper regards the chip surface as random texture, and deals with the image modeling of randon texture image for searching the surface defects. For texture modeling, we consider the relation of a pixel and neighborhood pixels as noncasul model and extract the statistical characteristics from the radom texture field by using the 2D AR model(Aut oregressive). This paper regards on image as the output of linear system, and considers the fidelity or intelligibility criteria for measuring the quality of an image or the performance of the processing techinque. This study utilizes the variance of prediction error which is computed by substituting the gary level of pixel of another texture field into the two dimensional AR(autoregressive model)model fitted to the texture field, estimate the parameter us-ing the PAA(parameter adaptation algorithm) and design the defect detection filter. Later, we next try to study the defect detection search algorithm.

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SOPC 기반의 재구성 가능한 로봇제어기 구현 (Implementation of SOPC-based Reconfigurable Robot Controller)

  • 최영준;박재현;최기홍
    • 제어로봇시스템학회논문지
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    • 제10권3호
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    • pp.261-266
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    • 2004
  • Recently, a variety of intelligent robots are developed for the personal purpose beyond the industrial application. These intelligent robots have ranges of sensors, actuators, and control algorithms to their application. In this paper we propose a reconfigurable robot controller, $SR^2$c (The SOPC-based Reconfigurable Robot Controller), based on SOPC (System on a Programmable Chip), that can be reconfigurable easily by software. The proposed robot controller contains not only a processing module but also robot-specific IP's. To show a feasibility of the proposed robot controller, a small entertainment robot, Wizard-4 is implemented with a single chip controller as proposed in this paper.

FPGA를 이용한 공간벡터 변조 PWM 및 디지털 제어부의 System On Programmable Chip 설계 (Design of Space Vector Modulation PWM and Digital Control of System On Programmable-Chip Using FPGA)

  • 황정원;김승호;양빈;이천기;박승엽
    • 전기학회논문지P
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    • 제61권1호
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    • pp.47-54
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    • 2012
  • This paper presents implementation of SVPWM technique for three phase Voltage Source Inverter using FPGA. Software-based vector-control calculations much this drawback, in order to improve the hardware-vector-control tries. Without the need for additional software, vector control algorithm is designed to be modular SOPC, and DSP will reduce most of the operations. In this paper, the SVPWM that using HDL for the AC motor vector control algorithm level, and the dead time part and the speed control in order to controled a speed detector and designed in the form of modules. Then ALTERA corporation Cyclone III series EP3C16F484 can be verified by implemented.

5상 펜타곤 결선방식 스테핑 모더의 마이크로스텝 구동을 위한 저가형 전용 칩 설계에 관한 연구 (A Study on the One-chip Design of Low Cost for Micro-stepping Drive of 5-Phase Stepping Motor Having Pentagon Type Winding)

  • 김명현;안호균;박승규;손영철
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2002년도 전력전자학술대회 논문집
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    • pp.451-454
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    • 2002
  • In this paper, studied on the one-chip design of low cost for the micro-stepping drive having 5-phase Pentagon Type winding. Micro-stepping method in order to eliminate effectively the resonant phenomena and to Increase the positional resolution. This paper proposed trapezoidal current wave- form for current control and provided design- method by using only one-chip of low cost. Therefore the drive will be simple and small size. Also the drive will have a lot of advantage at commercial business. Finally the above study has been implemented on the VHDL. Simulation has been performed to verify the PWM for micro-stepping drive.

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BLDC 전동기의 디지털 속도제어기에 관한 연구 (A Study on the Implementation af a Digital Spaed Controlled BLDC Drive)

  • 노광호;김용;이은영;조규만;이규훈
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 B
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    • pp.991-993
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    • 2000
  • The paper presents the software control of a brush-less do motor with parameter identification. Not only speed and current controls but also a real-time identification of the motor parameters can be implemented by software using the digital signal processor TMS320F240. The DSP Controller TMS320F240 from Texas Instruments is suitable for a wide range of motor drives TMS320F240 provides a single chip solution by integrating on-chip not only a high computational power but also all the peripherals necessary for electric motor control. This new family of DSPs enables single chip, cost effective, modular and increased performance solutions for BLDC drives. The present paper describes how a speed controlled brushless DC drive can be implemented using TMS320F240 and what kind of results can be achieved.

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LON CHIP을 이용한 SMT MOUNTER의 FEEDER CONTROL (A USING LON CHIP FEEDER CONTROL FOR THE SMT MOUNTER)

  • 임응규;노성찬;김윤호
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.167-171
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    • 2001
  • In PCB assembling line, it needs SMD mounter. In this paper, the feeder of the SMD mounter, which carry component to the mounter is designed. Up to now, mechanical air feeder is mainly used. But in these days, it is developed to the electrical feeder with network. There are many kind of feeders with various control technique. In this paper, the feeder with BLDC motor and LON chip is designed and implemented. Then the experimental results are presented.

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DSP Chip을 이용한 공간벡터 변조방식의 인버터 출력파형개선 (Improvement of Inverter Output Waveform with Space Vector Modulation using the DSP-Chip)

  • 김동준;정을기;유두영;전희종
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.739-741
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    • 1993
  • This paper deals with the Improvement of inverter output waveform with space vector modulation using the DSP-chip. The proposed scheme can be considered as a alternative of the conventional, subharmonic method. This scheme features a maximum output voltage that is 15% greater. The number of switchings is also 30% less than the one obtained by subharmonic modulation method(SHM) A performance function(PF) which is the time integral function of the inverter output voltage is introduced in this paper. An optimal PWM pattern is obtained by minimizing the distortion factor of performance function. The experiment was carried out with an TMS320C25.

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FPGA를 이용한 2축 보간기의 설계 (Design of a 2-axis interpolator using FPGA)

  • 여수진;김종은;원종백;박종식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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    • pp.596-599
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    • 2003
  • In this paper, we designed the digital pulse motor control chip including a circular interpolation function. The proposed algorithm in this paper is a nonparametric cure generation algorithm (Jordan's algorith) and a very simple algorithm. So the design for this algorithm used a small number of gates. Also an average error is fairly low. The max output speed is 4Mpps(Pulse per second), the max input frequency is 16MHz and the chip is useful for the stepping and servo motors. The software contains one or two, and many axes linear interpolation algorithm and two axes circular interpolation algorithm.

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