• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.11 no.1
• /
• pp.116-123
• /
• 2000

This paper presents a linearizer using the feedforward loop which can be applied to PCS base-station applications. This linearizer used a IM amplifier and an auxiliary amplifier in order to remove delay lines used in the predistortor using the feedforward technique. The delay line in error loop is changed by the main power amplifier(PA) and the error amplifier is utilized to amplify the error signal which fed to the output of main amplifier. The linearizer was simulated by HP ADS ver 1.1 and fabricated on GML 1000 with thickness of 0.8 mm and dielectric constant of 3.2. Two-tone signals at 1.85 GHz and 1.851 GHz with -7dBm/tone from synthesizers are injected into the main PA. The main PA with a 27 dB gain and a $P_{1dB}$ of 29 dBm(two-tone) was utilized. The reduction of intermodulation distortion (IMD) is around 17 dB.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.1
• /
• pp.32-37
• /
• 2007

A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.

• Journal of electromagnetic engineering and science
• /
• v.16 no.1
• /
• pp.44-51
• /
• 2016

A commercial $0.25{\mu}m$ GaN process is used to implement 6-18 GHz wideband power amplifier (PA) monolithic microwave integrated circuits (MMICs). GaN HEMTs are advantageous for enhancing RF power due to high breakdown voltages. However, the large-signal models provided by the foundry service cannot guarantee model accuracy up to frequencies close to their maximum oscillation frequency ($F_{max}$). Generally, the optimum output load point of a PA varies severely according to frequency, which creates difficulties in generating watt-level output power through the octave bandwidth. This study overcomes these issues by the development of in-house large-signal models that include a thermal model and by applying distributed L-C output load matching to reactive matched amplifiers. The proposed GaN PAs have successfully accomplished output power over 5 W through the octave bandwidth.

• Transactions on Semiconductor Engineering
• /
• v.2 no.3
• /
• pp.6-12
• /
• 2024

This paper presents a study on a 2.4GHz differential cascode power amplifier(PA) fabricated using a 130nm CMOS process. This PA is designed for wireless power transmission applications and consists of two differential stages with custom-designed balun transformers for single-ended output. Balun transformers are utilized not only for the output stage but also for power match-ing between each stage. Additionally, a bias circuit with temperature compensation capability is added to maintain stable bias voltage in the 2.4GHz frequency band. As a result, it achieves an output power of 21.75 dBm with a power-added efficiency(PAE) of 40.9% at TT/40℃.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.2
• /
• pp.81-86
• /
• 2007

In this paper, the Power Added Efficiency (PAE) and linearity of class-F PA has been improved by using the PBG structure and the application of EER structure, simultaneously. The adaptive bias control circuit has been employed to improve the PAE through the application of EER structure. The PBG structure has been adapted for improving the Linearity by suppressing the harmonics on the output of amplifier. The PAE and the 3rd Inter-Modulation Distortion (IMD) has improved 34.56%, 10.66 dB, compared with those of the conventional Doherty amplifier, respectively.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
• /
• 2000.10a
• /
• pp.222-227
• /
• 2000

"Side scan sonar" using acoustic signal has been developed to survey cable laying, sunken bodie\ulcorner bottom and so on. It use the acoustic signals, which are emitted from two transducer arrays, to get gemetri\ulcorner target area. This system consists of transceiver board, towed body, and deck unit. The transceiver board, w\ulcorner watertight canister of the towed body, controls the transmitting and receiving of 400kHz acoustic signals from \ulcorner After receiving the scattered signals, it processes the filtering, AGF(Automatic Gain Control), TVG(Time Heterodyne. The deck unit is composed of the signal processing part, A/D converter, power supplier, and real\ulcorner And the towed body has been designed to satisfy the optimal hydrodynamic behavior during towing. The de\ulcorner theory of transceiving part and some results from field-experiments will be introduced here.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.40 no.1
• /
• pp.9-15
• /
• 2015

A CMOS band-pass delta-sigma modulator(BPDSM) and cascode class-E power amplifier have been developed CMOS for Class-S power amplifier applications. The BPDSM is operating at 1-GHz sampling frequency, which converts a 250-MHz sinusoidal signal to a pulse-width modulated digital signal without the quantization noise. The BPDSM shows a 25-dB SQNR(Signal to Quantization Noise Ratio) and consumes a power of 24 mW at an 1.2-V supply voltage. The class-E power amplifier exhibits an 18.1 dBm of the maximum output power with a 25% drain efficiency at a 3.3-V supply voltage. The BPDSM and class-E PA were fabricated in the Dongbu's 110-nm CMOS process.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.18 no.5
• /
• pp.283-288
• /
• 2018

In this paper, it is required that the next generation wireless transmission system can support a large number of users without distortion of transmission signal with high data rate in various different propagation environment while using limited resources as efficiently as possible, and therefore an efficient transmission system is continuously required. Because of the large amount of data to be handled in a limited frequency band, a very complex digital modulation scheme is adopted. the linearity of the power amplifier determines the linearity of the entire communication system, and thus a linear amplifier is required. In cognitive radion systems, there is a power control issue in the relationship between primary and secondary users. This problem is solved by simulating the communication system so as to select the cognitive radio power while power control while overcoming linearity by using feed-forward PA.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.45 no.1
• /
• pp.110-114
• /
• 2008

In this paper, high efficient class F power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. Dual band amplifier is 32.65dBm output power, gain 11dB and PAE 36% at the 2.14GHz, 7dB gain at the 5.2GHz. Design of a dual band class F power amplifier using harmonic control circuit. The measured are 9.9dB gain, 30dBm output power and PAE 55% at the 2.14GHz, 11.7dB gain at the 5.2GHz. This paper is being used the load-pull method and it maximizes output power and it is using the only one transistor in the paper. As a result, this research will obtain a dual band high PAE power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.30 no.2
• /
• pp.104-110
• /
• 2019

In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.