• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.207-209
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• 2004

Currently, for satisfying the needs of scaled MOSFET's a high quality thin oxide dielectric is desired because the properties of conventional $SiO_2$ film are not acceptable for these very small sized transistors. As an alternative gate dielectric have drawn considerable alternation due to their superior performance and reliability properties over conventional $SiO_2$, to obtain the superior characteristics of ultra thin dielectric films, $N_2O$ grown thin oxynitride has been proposed as a dielectric growtuanneal ambient. In this study the authors observed process characteristics of $N_2O$ grown thin dielectric. In view points of the process characteristics of MOS capacitor, the sheet resistance of 4.07$[\Omega/sq.]$, the film stress of $1.009e^{10}[dyne/cm^2]$, the threshold voltage$(V_t)$ of 0.39[V], the breakdown voltage(BV[V]) of 11.45[V] was measured in PMOS. I could achieve improved electrical characteristics and reliability for deep submicron MOSFET devices with $N_2O$ thin oxide.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.8
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• pp.491-495
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• 2017

We investigated solution-processed indium-zinc oxide (IZO) thin-film transistors (TFTs) by inserting a 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD) buffer layer. This buffer layer efficiently tuned the energy level between the semiconducting oxide channel and metal electrode by increasing charge extraction, thereby enhancing the overall device performance: the IZO TFT with embedded PBD layer (thickness: 5 nm; width: $2,000{\mu}m$; length: $200{\mu}m$) exhibited a field-effect mobility of $1.31cm^2V^{-1}s^{-1}$, threshold voltage of 0.12 V, subthreshold swing of $0.87V\;decade^{-1}$, and on/off current ratio of $9.28{\times}10^5$.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.209.1-209.1
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• 2015

Indium gallium zinc oxide (IGZO), indium zinc oxide (IZO) 그리고 zinc tin oxide (ZTO) 같은 zinc oxide 기반의 산화물 반도체는 높은 이동도, 투과도 그리고 유연성 같은 장점을 갖고 있어, display application의 backplane 소자로 적용되고 있다. 또한 최근에는 산화물 반도체를 이용한 thin-film transistor (TFT) 뿐만아니라 resistive random access memory (RRAM), flash memory 그리고 pH 센서 등 다양한 반도체 소자에 적용을 위한 연구가 활발히 진행 중이다. 그러나 zinc oxide 기반의 산화물 반도체의 전기 화학적 불안정성은 위와 같은 소자에 적용하는데 제약이 있다. 산화물 반도체의 안정성에 영향을 미치는 다양한 요인들 중 한 가지는, sputter 같은 plasma를 이용한 공정 진행 시 active layer가 plasma에 노출되면서 threshold voltage (Vth)가 급격하게 변화하는 plasma damage effect 이다. 급격한 Vth의 변화는 동작 전압의 불안정성을 가져옴과 동시에 누설전류를 증가시키는 결과를 초래 한다. 따라서 본 연구에서는, IGZO 기반의 TFT를 제작 후 plasma 분위기에 노출시켜, power와 노출 시간에 따른 전기적 특성 변화를 확인 하였다. 또한, thermal annealing을 적용하여 열처리 온도와 시간에 따른 Vth의 회복특성을 조사 하였다. 이러한 결과는 추후 산화물 반도체를 이용한 다양한 소자 설계 시 유용할 것으로 기대된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.341-341
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• 2012

Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.995-997
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• 2009

$In_2O_3$ thin-film transistors (TFTs) were fabricated on various dielectrics [$SiO_2$ and self-assembled nanodielectrics (SANDs)] by spin-coating a $In_2O_3$ film precursor solution consisting of methoxyethanol (solvent), ethanolamine (EAA, base), and $InCl_3$ as the $In^{3+}$ source. Importantly, an optimized film microstructure characterized by the high-mobility $In_2O_3$ 004 phase, is obtained only within a well-defined base: $In^{3+}$ molar ratio. The greatest electron mobilities of ~ 44 $cm^2$, for EAA:$In^{3+}$ molar ratio = 10, $V^{-1}s^{-1}$, is measured for $n^+$-Si/SAND/$In_2O_3$/Au devices. This result combined with the high $I_{on}:I_{off}$ ratios of ~ $10^6$ and very low operating voltages (< 5 V) is encouraging for high-speed applications.

• ETRI Journal
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• v.31 no.6
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• pp.660-666
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• 2009

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.248-249
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• 2008

ZnO (Zinc Oxide) thin film can be applied to various devices. Recently, ZnO film has been promoted in transparent TFTs (thin film transistors) because of high transparency and low temperature process. In this paper, ZnO thin films were grown on glass with the three conditions of RF sputtering power, which are 50W, 75W, 100W. Their structural, electrical and optical properties were investigated by using XRD, UV-Visible spectrometer and 4-point probes. In the ZnO film with 50W process, good crystallinity, high transmittance, and high sheet resistance were shown. In conclusion, the ZnO film with 50W can be an optimal channel layer of TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.927-930
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• 2009

We studied the solution processes of IGZO thin films and investigated the electrical characteristics of thin film transistor (TFT) with sol-gel processed InGaZn-oxide active semiconductor layer. In particular, the effect of composition variation and post annealing temperature were studied by using solutions having various metal cation ratios to optimize transistor performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.450-450
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• 2007

Indium tin oxide (ITO), which is used as an electrode in organic thin film transistors (OTFT), was modified with a self-assembled monolayer (SAM) by wet chemical surface modification. The surface of the ITO was treated by dipping method in a solution of 2-chloroethane phosphonic acid (2-CEPA) at room temperature. The work function in the ITO which was modified with the SAM in the 2-CEPA had 5.43eV. A surface energy and a transmittance were unchanged in an error range. On this study, therefore, possibility of ohmic contact is showed in the interface between the ITO and the organic semiconductors. These results suggest that the treatment of the ITO with the SAM can greatly enhance the performance of the OTFT.