Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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A Study on Electric Characteristics of Silicon Implanted p Channel Polycrystalline Silicon Thin Film Transistors Fabricated on High Temperature

고온에서 제조된 실리콘 주입 p채널 다결정 실리콘 박막 트랜지스터의 전기 특성 변화 연구

  • Lee, Jin-Min (Institute of Research and Development, ElnT.Co.,Ltd.)
  • Received : 2011.02.18
  • Accepted : 2011.04.13
  • Published : 2011.05.11
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Abstract

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

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References

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