• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.10
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• pp.595-600
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• 2016

In this paper, the oxide currents of thin silicon oxides is investigated. The oxide currents associated with the on time of applied voltage were used to measure the distribution of voltage stress induced traps in thin silicon oxide films. The stress induced leakage currents were due to the charging and discharging of traps generated by stress voltage in the silicon oxides. The stress induced leakage current will affect data retention in memory devices. The oxide current for the thickness dependence of stress current and stress induced leakage currents has been measured in oxides with thicknesses between $109{\AA}$, $190{\AA}$, $387{\AA}$, and $818{\AA}$ which have the gate area $10^{-3}cm^2$. The oxide currents will affect data retention and the stress current, stress induced leakage current is used to estimate to fundamental limitations on oxide thicknesses.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.102-105
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• 1997

The thickness dependence of stress voltage oxide currents has been measured in oxides with thicknesses between 10nm and 80nm. The oxide currents were shown to be composed of stress current and transient current. The stress current was caused by trap assited tunneling through the oxide. The transient current was caused by the tunneling charging and discharging of the trap in the interfaces. The stress current was used to estimate to the limitations on oxide thicknesses. The transient current was used to the data retention in memory devices.

• Bulletin of the Korean Chemical Society
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• v.33 no.5
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• pp.1465-1469
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• 2012

For given electrolytes, different behaviors of anodic aluminum oxide (AAO) and anodic titanium oxide (ATO) during electrochemical thinning are explained by ionic and electronic current modes. Branched structures are unavoidably created in AAO since the switch of ionic to electronic current is slow, whereas the barrier oxide in ATO is thinned without formation of the branched structures. In addition, pore opening can be possible in ATO if chemical etching is performed after the thinning process. The thinning was optimized for complete pore opening in ATO and potential-current behavior is interpreted in terms of ionic current-electronic current switching.

• Journal of IKEEE
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• v.27 no.4
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• pp.399-404
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• 2023

In this paper, we analyzed the current path in the O/N/O (Oxide/Nitride/Oxide) structure of 3D NAND Flash memory and in the O/N/F (Oxide/Nitride/Ferroelectric) structure where the blocking oxide is replaced by a ferroelectric. In the O/N/O structure, when V_read is applied, a current path is formed on the backside of the channel due to the E-fields of neighboring cells. In contrast, the O/N/F structure exhibits a current path formed on the front side due to the polarization of the ferroelectric material, causing electrons to move toward the channel front. Additionally, we performed an examination of device characteristics considering channel thickness and channel length. The analysis results showed that the front electron current density in the O/N/F structure increased by 2.8 times compared to the O/N/O structure, and the front electron current density ratio of the O/N/F structure was 17.7% higher. Therefore, the front current path is formed more effectively in the O/N/F structure than in the O/N/O structure.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.3
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• pp.411-418
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• 1998

The thickness dependence of stress electric filed oxide currents has been measured in oxides with thicknesses between 10 nm and 80 nm. The oxide currents were shown to be composed of stress current and transient current. The stress current was composed of stress induced leakage current and dc current. The stress current was caused by trap assisted tunneling through the oxide. The transient current was caused by the tunneling charging and discharging of the trap in the interfaces. The stress current was used to estimate to the limitations on oxide thicknesses. The transient current was used to the data retention in memory devices.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.162-170
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• 1996

A breakdown model of gate oxides under constant current stresses is proposed. This model directly relates the oxide lifetime to the stress current density, and includes statistical nature of oxide breakdown using the concept of "effective oxide thinning". It is shown tha this model can reliably predict the TDDB characteristics for any current stress levels and oxide areas.

• Transactions on Electrical and Electronic Materials
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• v.4 no.6
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• pp.32-37
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• 2003

In this paper, the trap characteristics of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between 113.4nm and 814nm, which have the gate area 10$\^$-3/ $\textrm{cm}^2$. The stress induced leakage currents will affect data retention, and the stress current and transient current is used to estimate to fundamental limitations on oxide thicknesses.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12
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• pp.1065-1070
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• 2003

HTO(High Temperature Oxide) films are mainly used as a gate insulator for polysilicon thin film transistors(Poly-Si TFT's). The HTO films, however, show the demerits of a high leakage current and a low electric breakdown voltage comparing with conventional thermal oxides even though they have a better surface in roughness than the thermal oxides. In this paper, we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's. The leakage current and electric breakdown voltage of the ONO and HTO were measured. The drain current variation of poly-Si TFT's with a variety of gate insulators was observed. The thickness optimization in ONO films was carried out by studying I$\_$on/I$\_$off/ ratio of the poly-Si TFT's as a function of the thickness of ONO film adopted as gate insulator.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.350-350
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• 2012

본 연구에서는 Oxide 두께가 각각 4, 6 nm인 Symmetric NMOSFET의 전기적 특성 분석에 관한 연구를 진행하였다. 게이트 전압에 따른 Drain saturation current (IDSAT), Threshold Voltage(VT) 및 드레인 전압에 따른 Off-states 특성 변화를 분석하였다. 소자 측정 결과 oxide 두께가 4 nm인 경우 Vt는 0.3 V, IDSAT은 73 ${\mu}A$ (@VD=0.05)로, oxide 두께가 6 nm인 경우 Vt는 0.65 V, IDSAT은 66 ${\mu}A$ (@VD=0.05)로 각각 측정되었다. 이는 oxide 두께가 얇은 경우 게이트 전압 인가 시 Electric field 증가에 따른 것으로 판단된다. 또한 드레인 전압 인가에 따른 소자 특성 분석 결과 oxide 두께가 4nm인 경우 급격한 Gate leakage 증가를 보였으며, 이에 따라 Off-state에서의 leakage current가 증가함을 확인하였다. 본 연구는 Oxide 두께에 따른 MOSFET 소자의 전기적 특성 분석을 위해 진행되었으며, 상기 결과와 같이 oxide 두께 가변은 Idsat, Vt, leakage current 등의 주요 파라미터에 영향을 주어 NMOSFET 소자의 전기적 특성을 변화시킴을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.164-169
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• 2008

The effects of the antisite related defects on the electronic structure of silica and the gate leakage current have been investigated using first-principles calculations. Energy levels related to the antisite defects in silicon dioxide have been introduced into the bandgap, which are nearly 2.0 eV from the top of the valence band. Combining with the electronic structures calculated from first-principles simulations, tunneling currents through the silica layer with antisite defects have been calculated. The tunneling current calculations show that the hole tunneling currents assisted by the antisite defects will be dominant at low oxide field whereas the electron direct tunneling current will be dominant at high oxide field. With increased thickness of the defect layer, the threshold point where the hole tunneling current assisted by antisite defects in silica is equal to the electron direct tunneling current extends to higher oxide field.