• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.221-225
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• 2007

We have prepared $\delta$-phase SbTe alloy with various Sb contents of 64, 72, and 76 at. % and investigated the phase change temperature, the crystal structures of $\delta$-phase SbTe alloy, and determined the ovonic threshold switching voltages with edge contact type phase transition dimensions. As a result, the crystallization temperature is slightly reduced from 126 to $122^{\circ}C$, whereas the melting temperature is not changed. The ovonic threshold switching voltage is reduced from 1.6 to 0.9 V as increasing the Sb content from 64 to 76 at. %. It is found that the reductions of crystallization temperature and the ovonic threshold switching voltage are closely related with the interplanar spacing between adjacent atomic layers and the stacking number of atomic layers in a unit cell.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.280-281
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• 2011

We fabricated the devices of TFT type with the amorphous chalcogenide channel. A single device consists of a Pt source and drain, a Ti glue layer and a GeSe chalcogenide channel layer on SiO2/Si substrate which worked as the gate. We confirmed the drain current with variations of gate bias and channel size. The I-V curves of the switching device are shown in Fig. 1. The channel of the device always contains amorphous state, but can be programmed into two states with different threshold voltages (Vth). In each state, the device shows a normal Ovonic switching behavior. Below Vth (OFF state), the current is low, but once the biasing voltage is greater than Vth (ON state), the current increases dramatically and the ON-OFF ratio is about 4 order. Based on the experiments, we contained the conclusion that the gate voltage can enhance the drain current, and the electric field by the drain voltage affects the amorphous-amorphous transition. The switching device always contains the amorphous state and never exhibits the Ohmic behavior of the crystalline state.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.403-404
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• 2012

We fabricated TFT devices with the GeSe channel. A single device consists of a Pt source and drain, a Ti glue layer and a GeSe chalcogenide channel layer on SiO2/Si substrate which worked as the gate. We confirmed the drain current with variations of gate bias and channel size. The I-V curves of the switching device are shown in Fig. 1. The channel of the device always contains amorphous state, but can be programmed into two states with different threshold voltages (Vth). In each state, the device shows a normal Ovonic switching behavior. Below Vth (OFF state), the current is low, but once the biasing voltage is greater than Vth (ON state), the current increases dramatically and the ON-OFF ratio is high. Based on the experiments, we draw the conclusion that the gate voltage can enhance the drain current, and the electric field by the drain voltage affects the amorphous-amorphous transition. The switching device always contains the amorphous state and never exhibits the Ohmic behavior of the crystalline state.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.78.2-78.2
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• 2012

최근 PRAM의 집적도 향상 및 3차원 적층에 의한 메모리 용량 향상을 위해 셀 선택 스위치로서 박막형 Ovonic Threshold Switching (OTS) 소자를 적용한 Cross bar 구조의 PRAM이 제안된 바 있다. OTS 소자는 비정질 칼코지나이드를 핵심층으로 하는 2단자 소자로서 고저항의 Off 상태에 특정 값 (문턱스위칭 전압) 이상의 전압을 가해주면 저저항의 On 상태로 바뀌고 다시 특정 값 (유지전압) 이하로 전압을 감소시킴에 따라 고저항의 Off 상태로 복원하는 특성을 갖는다. 셀 선택용 스위치로 적용되기 위해서는 핵심적으로 On-Off 상태간의 가역적인 변화 중에도 재료가 비정질 구조를 안정하게 유지해야 하며 전기적으로는 Off 상탱의 저항이 크고 또한 전류값의 점멸비가 커야 한다. GeSe는 이원계 재료로서 단수한 구성에도 불구하고 OTS 소자가 갖추어야할 기본적인 특성을 가지는 것으로 알려져 있다. 본 연구에서는 GeSe로 구성된 OTS 재료에 경원소인 질소를 첨가하여 비정질 상태의 안정성과 소자특성의 개선 효과를 조사하였다. RF-puttering 시 Ar과 $N_2$의 혼합 Gas를 사용하여 조성이 $Ge_{62}Se_{38}$ ($N_2$ : 3%)인 박막을 제작하여 DSC를 통해 결정화온도(Tx)를 확인하였고, $N_2$ gas의 함유량이 각각 1 %, 2 %, 3 %인 $Ge_{62}Se_{38}$인 박막을 전극의 접촉 부 면적이 $10{\times}10\;{\mu}m^2$인 cross-bar 구조의 소자로 제작하여 Threshold switching voltage ($V_{th}$), Delay time ($t_d$), $I_{on}/I_{off}$ 그리고 Endurance 특성을 평가하였다. DSC 분석 결과 $N_2$ 가 3 % 첨가된 GeSe 박막은 Tx가 $371^{\circ}C$에서 $399^{\circ}C$로 증가되었다. $N_2$가 1% 첨가된 GeSe 소자를 측정한 결과 $V_{th}$의 변화 없는 가운데 $I_{on}/I_{off}$이 약 $2{\times}10^3$에서 $5{\times}10^4$로 향상되었다. Endurance 특성 역시 $10^4$에서 $10^5$번으로 향상되었다. $t_d$의 경우 비정질 상태의 저항 증가로 인해 약 50% 증가되었다. 이러한 $N_2$의 첨가로 인한 비정질 GeSe 박막의 변화 원인에 대한 분석 결과를 소개할 예정이다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.6
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• pp.547-555
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• 2023

High-density crossbar arrays based on storage class memory (SCM) are ideally suited to handle an exponential increase in data storage and processing as a central hardware unit in the era of AI-based technologies. To achieve this, selector devices are required to be co-integrated with SCM to address the sneak-path current issue that indispensably arises in such crossbar-type architecture. In this perspective, we first summarize the current state of tellurium-based threshold-switching devices and recent advances in the material, processing, and device aspects. We thoroughly review the physicochemical properties of elemental tellurium (Te) and representative binary tellurides, their tailored deposition techniques, and operating mechanisms when implemented in two-terminal threshold switching devices. Lastly, we discuss the promising research direction of Te-based selectors and possible issues that need to be considered in advance.