• Title/Summary/Keyword: Output phase control

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Implementation and Characteristic Analysis of DC/DC Voltage Regulator for Operation Efficiency Improvement in PV system (태양광발전의 운용효율 향상을 위한 DC/DC 전압 레귤레이터의 구현 및 특성분석)

  • Kim, Chanhyeok;Choi, Sungsik;Kang, Minkwan;Jung, Youngmun;Rho, Daeseok
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.4
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    • pp.201-208
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    • 2017
  • Recently, the installation of photovoltaic(PV) systems has been increasing due to the worldwide interest in eco-friendly and abundant solar energy. On the other hand, a PV system has approximately 25% power loss while the energy generated from solar cells is transformed to the power coupling point through a power conversion system (DC/AC). If the output voltage of a string in the PV system is lower than the operating range of the inverter when a part of module in the string has a shadow due to weather conditions, the string is not synchronized and the whole efficiency of output power in a PV system may be reduced significantly. Therefore, to overcome this problem, this paper proposes a novel control method to compensate for the lower voltage by introducing a DC/DC voltage regulator for each string in a PV system, which adopts a concept for MPPT (Maximum Power Point Tracking) control function using the P&O algorithm and adopts constant voltage control method used in an existing inverter. This paper also implements a 2kW DC/DC voltage regulator based on the proposed algorithm and performs a variety of scenario-based experiments. From the simulation result, it was confirmed that the operation efficiency in the proposed method is improved compared to the existing method.

Design of a Dual Band High PAE Power Amplifier using Single FET and CRLH-TL (Single FET와 CRLH 전송선을 이용한 이중대역 고효율 전력증폭기 설계)

  • Kim, Seon-Sook;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.2
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    • pp.56-61
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    • 2010
  • In this paper, high efficient power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of the all harmonic components is very difficult m dual-band, we have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Dual-band characteristics in the output has to balance. Two operating frequencies are chosen at 2.14 GHz and 5.2 GHz in this work. The measured results show that the output power of 28.56 dBm and 29 dBm was obtained at 2.14 GHz and 5.2 GHz, respectively. At this point, we have obtained the power-added efficiency (PAE) of 65.824 % and 69.86 % at two operation frequencies, respectively.

Design of Dual-band Power Amplifier using CRLH of Metamaterials (메타구조의 CRLH를 이용한 이중대역 전력증폭기 설계)

  • Ko, Seung-Ki;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.12
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    • pp.78-83
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    • 2010
  • In this paper, a novel dual-band power amplifier using metamaterials has been realized with one RF GaN HEMT diffusion metal-oxide-semiconductor field effect transistor. The CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. We have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency. Two operating frequencies are chosen at 900 MHz and 2140 MHz in this work. The measured results show that the output power of 39.83 dBm and 35.17 dBm was obtained at 900 MHz and 2140 MHz, respectively. At this point, we have obtained the power-added efficiency (PAE) and IMD of 60.2 %, -23.17dBc and 67.3 %, -25.67dBc at two operation frequencies, respectively.

Dynamic Characteristics Improvement of a Step-Down Chopper Using Load Current Feed-Forward Compensator (부하전류 전향보상기를 이용한 강압쵸퍼의 동특성 항상)

  • Chun, Ji-Young;Jeon, Kee-Young;Chung, Chun-Byung;Han, Kyung-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.12
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    • pp.29-35
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    • 2008
  • In this paper, The author present a load current feed-forward compensator by method that improve voltage controller of Step-down Chopper to get stable output voltage to sudden change of load current. To confirm the characteristics of a presented load current feed-forward compensator compared each transfer function of whole system that load current feed-forward compensator is added with transfer function of whole system that existent voltage controller is included using Mason gains formula in Root locus and Bode diagram. As a result the pole of system is improved, extreme point of the wave and system improves, and size of peak value and phase margin of break frequency in resonance frequency confirmed that is good. Therefore, presented control technique could confirm that reduce influence by perturbation and improves stationary state and dynamic characteristics in output of Step-down Chopper.

Fractional-N PLL Frequency Synthesizer Design (Fractional-N PLL (Phase-Locked Loop) 주파수 합성기 설계)

  • Kim Sun-Cheo;Won Hee-Seok;Kim Young-Sik
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.7 s.337
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    • pp.35-40
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    • 2005
  • This paper proposes a fractional-N phase-locked loop (PLL) frequency synthesizer using the 3rd order ${\Delta}{\sum}$ modulator for 900MHz medium speed wireless link. The LC voltage-controlled oscillator (VCO) is used for the good phase noise property. To reduce the lock-in time, a charge pump has been developed to control the pumping current according to the frequency steps and the reference frequency is increased up to 3MHz. A 36/37 fractional-N divider is used to increase the reference frequency of the phase frequency detector (PFD) and to reduce the minimum frequency step simultaneously. A 3rd order ${\Delta}{\sum}$ modulator has been developed to reduce the fractional spur VCO, Divider by 8 Prescaler, PFD and Charge pump have been developed with 0.25um CMOS, and the fractional-N divider and the third order ${\Delta}{\sum}$ modulator have been designed with the VHDL code, and they are implemented through the FPGA board of the Xilinx Spartan2E. The measured results show that the output power of the PLL is about -lldBm and the phase noise is -77.75dBc/Hz at 100kHz offset frequency. The minimum frequency step and the maximum lock-in time are 10kHz and around 800us for the maximum frequency change of 10MHz, respectively.

A Control of Vibrator Using PM Excited Transverse Flux Linear Motor (영구자석 여자 횡축형 선형 전동기(TFLM)를 이용한 가진기 제어)

  • 임태윤;강도현;김종무;김동희
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.3
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    • pp.281-288
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    • 2002
  • This paper has realized a control system of a vibrator using PM excited Transverse Flux Linear Motor(TFLM). Proposed vibrator can supply a vibration force up to 700[N] at rated current, wide operation range of vibration displacement and high frequency for a tested structure. Also, volume of a vibrator system can be decreased because of a high trust force rato(a thrust force per weight=N/Kg). A proposed vibrator instead of a hydraulic vibrator can improve efficiency and have may advantages of maintenance and management. A desired value command is a vibration frequency and displacement in a controller for a vibrator system and a controlled values we a instant position and velocity of a mover Output value of the controller is phase current controlled by PWM converter. In this research, Dynamic simulation has been executed for analysis of a control algorithm and dvnauuc characteristics and is compared with experimental result.

A three-region movable-boundary helical coil once-through steam generator model for dynamic simulation and controller design

  • Shifa Wu;Zehua Li;Pengfei Wang;G.H. Su;Jiashuang Wan
    • Nuclear Engineering and Technology
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    • v.55 no.2
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    • pp.460-474
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    • 2023
  • A simple but accurate mathematical model is crucial for dynamic simulations and controller design of helical coil once-through steam generator (OTSG). This paper presents a three-region movable boundary dynamic model of the helical coil OTSG. Based on the secondary side fluid conditions, the OTSG is divided into subcooled region (two control volumes), two-phase region (two control volumes) and superheated region (three control volumes) with movable boiling boundaries between each region. The nonlinear dynamic model is derived based on mass, energy and momentum conservation equations. And the linear model is obtained by using the transfer function and state space transformation, which is a 37-order model of five input and three output. Validations are made under full-power steady-state condition and four transient conditions. Results show good agreements among the nonlinear model, linear model and the RELAP5 model, with acceptable errors. This model can be applied to dynamic simulations and controller design of helical coil OTSG with constant primary-side flow rate.

Implementation of Voltage Control Dielectric Resonator Oscillator for FMCW Radar (FMCW 레이더용 전압제어 유전체 발진기의 구현)

  • 안용복;박창현;김장구;최병하
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.4
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    • pp.906-911
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    • 2004
  • In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator) applied to FMCW(Frequency Modulated Continuous Wave)Radar as stable source is implemented and constructed with a MESFET(Metal-semiconductor Field-Effect Transistor) for low noise, a dielectric resonate. of high frequency selectivity, and high Q varator diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated thrash harmonic balance simulation technique to provide the optimum performance. The measured result of a fabricated VCDRO shows that output is 2.22㏈m at 12.05GHz, harmonic suppression -30㏈c, phase noise -130㏈c at 100KHz offset, and sweep range of varator diode $\pm$18.7MHz, respectively. This oscillator will be available to FMCW Radar.

A Study on Efficiency Improvement of X-Band Power Amplifier Using Harmonic Control Circuit (고조파 제어 회로를 이용한 X-대역 전력 증폭기의 효율 개선에 관한 연구)

  • Kim, Hyoung-Jong;Choi, Jin-Joo;Kim, Dong-Yoon;Na, Hyung-Gi
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.9
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    • pp.987-994
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    • 2010
  • In this paper, a simple and effective active load-pull method is proposed, and the method to improve the efficiency of X-band power amplifier using harmonic control circuit is presented. The proposed active load-pull system mainly consists of directional coupler, phase shifter, short circuit, and power amplifier, and allows a user to access reflection coefficients near the edge of the Smith chart($\Gamma$=1) easily. The device used in this paper is Mitsubishi's GaAs FET MGF1801, and the operating frequency of the power amplifier is 9 GHz, The amplifier had output power of 21.65 dBm and drain efficiency of 24.9 % at class-A, and had output power of 21.46 dBm and drain efficiency of 53.3 % at class-AB. Harmonic control circuit is designed only second and third harmonic components because of the bandwidth limitation of the microwave components. The drain efficiency is improved as much as 6.4 % compared with class-AB power amplifier.

$0.13{\mu}m$ CMOS Quadrature VCO for X-band Application ($0.13{\mu}m$ CMOS 공정을 이용한 X-band용 직교 신호 발생 전압제어 발진기)

  • Park, Myung-Chul;Jung, Seung-Hwan;Eo, Yun-Seong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.8
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    • pp.41-46
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    • 2012
  • A quadrature voltage controlled oscillator(QVCO) for X-band is presented in this paper. The QVCO has fabricated in Charted $0.13{\mu}m$ CMOS process. The QVCO consists of two cross-coupled differential VCO and two differential buffers. The QVCO is controlled by 4 bit of capacitor bank and control voltage of varactor. To have a linear quality factor of varactors, voltage biases of varactors are difference. The QVCO generates frequency tuning range from 6.591 GHz to 8.012 GHz. The phase noise is -101.04 dBc/Hz at 1MHz Offset when output frequency is 7.150 GHz. The supply voltage is 1.5 V and core current 6.5-8.5 mA.