• Journal of the Korea Safety Management & Science
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• v.19 no.2
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• pp.147-157
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• 2017

The tourism experience factor is an essential source of competitive advantage in the tourism industry and is an important factor for predicting future tourism behavior. Tourism experience elements can be composed of areas of education, entertainment, aesthetics and deviance (Pine and Gilmore, 1998). This study examines the effect of tourist experience factors on tourist loyalty and it is meaningful to see if the experiential economic theory of Pine and Gilmore (1999) is applicable. In order to achieve the purpose of this study, we conducted a questionnaire survey on tourists using experiential tourism factors. As a result, it was found that recreational experiential factors had a significant effect on memory. Memory has a significant effect on both visitor satisfaction and tourist loyalty. This study has academic significance because it focuses on the tourism experience factor which is the core of experiential economic theory. Practical significance is that a lot of experiential contents should be found in order to better match the tourist experience factor to the requirements of visitors to the tourist site. As a result, it is expected to generate revenue and improve its competitiveness.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4B
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• pp.403-410
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• 2004

In general communication system is composed of processor subsystems, I/O processor subsystems and data storage device subsystems those are classified as their functions. In order to improve the data reliability, all subsystems are redundant. Storage device keeps the operational information such as system related information and charging information, and such informations must be stored in non-volatile memory. Flash memory and battery backup memory are commonly used as the non-volatile storage devices. But such kind of memories are expensive per unit capacity and data can't be restored when lost while not being backed up. In this paper we develop a redundant storage device to store a lot of data safely and reliably in communication system. The device consists of micro-controller, FPGA and hard disk It provides many functions those are rebuilding, automatic remapping, host service and remote host service. Also it is designed to provide host service while rebuilding is being done in order not to interrupt the communication services. The developed device can be used instead of expensive storage device like flash memory in various communication systems.

• The KIPS Transactions:PartA
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• v.14A no.4
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• pp.215-226
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• 2007

For past years, many distributed virtual shared-memory(DVSM) systems have been studied in order to develop a low-cost shared memory system with a fast interconnection network. But the DVSM needs a lot of data and control communication between distributed processing nodes in order to provide memory consistency in software, and this communication overhead significantly dominates the overall performance. In general, the communication overhead also increases as the number of processing nodes increase, so communication overhead is a very important performance factor for developing a large-scale DVSM system. In this paper, we study the performance scalability quantitatively and qualitatively for developing a large-scale DVSM system based on the next generation interconnection network, called the InfiniBand. Based on the study, we analyze a performance requirement of the next-coming interconnection network to be used for developing a performance-scalable DVSM system in the future.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.2
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• pp.59-66
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• 2013

In this paper, we proposed an optimal ILP algorithm on memory address code generation for DSP in embedded system. This paper using 0-1 ILP formulations DSP address generation units should minimize the memory variable data layout. We identify the possibility of the memory assignment of variable based on the constraints condition, and register the address code which a variable instructs in the program pointer. If the process sequence of the program is declared to the program pointer, then we apply the auto-in/decrement mode about the address code of the relevant variable. And we minimize the loads on the address registers to optimize the data layout of the variable. In this paper, in order to prove the effectiveness of the proposed algorithm, FICO Xpress-MP Modeling Tools were applied to the benchmark. The result that we apply a benchmark, an optimal memory layout of the proposed algorithm then the general declarative order memory on the address/modify register to reduce the number of loads, and reduced access to the address code. Therefor, we proved to reduce the execution time of programs.

• Journal of KIISE
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• v.43 no.9
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• pp.998-1007
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• 2016

In recent years, the cost of automotive ECU (Electronic Control Unit) has accounted for more than 30% of total car production cost. However, the complexity of testing and debugging an automotive ECU is increasing because automobile manufacturers outsource automotive ECU production. Therefore, a large amount of cost and time are spent to localize faults during testing an automotive ECU. In order to solve these problems, we propose a fault localization method in memory for developers who run the integration testing of automotive ECU. In this method, memory is partitioned by utilizing memory map, and fault-suspiciousness for each partition is calculated by utilizing memory update information. Then, the fault-suspicious region for partitions is decided based on calculated fault-suspiciousness. The preliminary result indicated that the proposed method reduced the fault-suspicious region to 15.01(%) of memory size.

• The Journal of the Korea Contents Association
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• v.21 no.10
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• pp.322-331
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• 2021

This article has attempted to explore the topic of everyday life and memory based on theoretical and methodological discussions on daily life, everydayness, sociology of everyday life, memory, social construction of memory, and social memory. In order to do this, Koreeda Hirokazu's debut feature film (Hirokazu Koreeda, 1995) which inquires about the encounters and separations, life and death in everyday life was selected as a research subject. According to the results, structured with 61 scenes talked that Yumiko's daily life was shattered in an instant due to Ikuo's death and her memory was also fragmented. But after that, her social memory can reconstruct a new daily life through the 'light' of will or hope for life. Hirokazu Koreeda tried to confirm that human encounters and partings, life and death are daily life itself or a part of it through 'light' such as sunlight and moonlight, street lamps and electric lamps in this film.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.23 no.4
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• pp.283-300
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• 2019

In this paper, we propose a new semi-analytic approach based on the generalized Taylor series for solving nonlinear differential equations of fractional order. Assuming the solution is expanded as the generalized Taylor series, the coefficients of the series can be computed by solving the corresponding recursive relation of the coefficients which is generated by the given problem. This method is called the generalized differential transform method(GDTM). In several literatures the standard GDTM was applied in each sub-domain to obtain an accurate approximation. As noticed in [19], however, a direct application of the GDTM in each sub-domain loses a term of memory which causes an inaccurate approximation. In this work, we derive a new recursive relation of the coefficients that reflects an effect of memory. Several illustrative examples are demonstrated to show the effectiveness of the proposed method. It is shown that the proposed method is robust and accurate for solving nonlinear differential equations of fractional order.

• KIISE Transactions on Computing Practices
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• v.24 no.1
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• pp.40-45
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• 2018

With the advent of big data and social networks, large-scale graph processing becomes popular research topic. Recently, an optimization technique called Gorder has been proposed to improve the performance of in-memory graph processing. This technique improves performance by optimizing the graph layout on memory to have better cache locality. However, since it is designed for in-memory graph processing systems, the technique is not suitable for disk-based graph engines; also the cost for applying the technique is significantly high. To solve the problem, we propose a new graph ordering called I/O Order. I/O Order considers the characteristics of I/O accesses for SSDs and HDDs to improve the performance of disk-based graph engine. In addition, the algorithmic complexity of I/O Order is simple compared to Gorder, hence it is cheaper to apply I/O Ordering. I/O order reduces the cost of pre-processing up to 9.6 times compared to that of Gorder's, still its performance is 2 times higher compared to the Random in low-locality graph algorithms.

• Journal of the Korean Academy of Child and Adolescent Psychiatry
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• v.27 no.2
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• pp.130-138
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• 2016

Objectives: The aim of this study was to develop auditory-verbal and visual-spatial memory tasks using smart devices for children aged 8 to 10 years and examine their validity. Methods: One-hundred and fourteen school-aged children were recruited through internet advertising. We developed memory tasks assessing auditory-verbal memory, visual-spatial memory, and working memory, and then examined their construct validity by examining the developmental trend of the children's mean scores with age. In order to examine the concurrent validity of the tasks, we conducted correlation analyses between the children's scores on the newly developed auditory-verbal, visual-spatial memory and working memory tasks and their scores on well-known standardized tests of memory and working memory, including the auditory-verbal memory subtests of the Korean Luria-Nebraska Neuropsychological Battery for Children, Korean Rey-Osterrieth Complex Figure Test, digit span and arithmetic subtest of Korean Educational Development Institute Wechsler Intelligence Scale for Children Revised, and Corsi block test. Results: The memory and working memory scores measured by the newly developed tasks tended to increase with age. Further, there were significant correlations between the scores of the four cognitive tasks and the corresponding scores of the standardized assessment tools. Conclusion: This study revealed promising evidence for the validity of the memory tasks using smart devices, suggesting their utility for school-aged children in research and clinical settings.

• Journal of the Korea Society of Computer and Information
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• v.21 no.5
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• pp.1-10
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• 2016

Magnetic disks have been used for decades in auxiliary storage devices of computer systems. In recent years, the use of NAND flash memory, which is called SSD, is increased as auxiliary storage devices. However, NAND flash memory, unlike traditional magnetic disks, necessarily performs the erase operation before the write operation in order to overwrite data and this leads to degrade the system lifetime and performance of overall NAND flash memory system. Moreover, NAND flash memory has the lower endurance, compared to traditional magnetic disks. To overcome this problem, this paper proposes EPET (Enhanced Prediction and Elapsed Time) wear leveling technique, which is especially efficient to portable devices. EPET wear leveling uses the advantage of PET (Prediction of Elapsed Time) wear leveling and solves long-term system failure time problem. Moreover, EPET wear leveling further improves space efficiency. In our experiments, EPET wear leveling prolonged the first bad time up to 328.9% and prolonged the system lifetime up to 305.9%, compared to other techniques.