• Journal of the Korean Institute of Landscape Architecture
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• v.29 no.3
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• pp.38-45
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• 2001

This study quantified annual $CO_2$, SO$_2$ and NO$_2$ uptake and annual $O_2$ production by trees in Yongin´s urban ecosystem, and explored values of urban tree plantings in atmospheric purification. Woody plant cover was only 7.7% with planting density of 1. trees/100$m^2$, and the tree-age structure was largely characterized by a young, growing tree population. Annual per capita pollutant emissions from fossil fuel consumption were 7.3t/yr for $CO_2$, 7.6kg/yr for SO$_2$, and 26.6kg/yr for NO$_{x}$. Carbon dioxide storage per unit urban area by trees was 13.1t/ha and the economic value for $CO_2$ storage was ￦6.6millions/ha. Annual atmospheric purification was 2.0t/ha/yr for $CO_2$ uptake, 2.0kg/ha/yr for SO$_2$ uptake, 4.0kg/ha/yr for NO$_2$ uptake and 1.5t/ha/yr for $O_2$ production, and the annual economic value for the atmospheric purification was ￦1.5millions/ha/yr. Urbantrees stored an amount of $CO_2$ equivalent to about 3.1% of the total annual $CO_2$ emissions, and annually offset total $CO_2$ emissions by 0.5%. Annual SO$_2$ and NO$_2$ uptake by trees equaled 0.5% of total SO$_2$ emissions and 0.3% of total NO$_{x}$ emissions, respectively. Urban trees also played an important role through producing annually 9.2 of the $O_2$ requirement for Yongin´s total population, despite relatively poor tree plantings. Future active plantings and greenspace enlargement in the study city could enhance the role of atmospheric purification by urban trees. The results from this study are expected to be useful in emphasizing environment benefits of urban trees, and in urging the continuous necessity for tree planting and management budget.get.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.166-174
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• 2010

SSDs are one of the best media to support portable and desktop computers' storage devices. Their features include non-volatility, low power consumption, and fast access time for read operations, which are sufficient to present flash memories as major database storage components for desktop and server computers. However, we need to improve traditional index management schemes based on B-Tree due to the relatively slow characteristics of flash memory operations, as compared to RAM memory. In order to achieve this goal, we propose a new index management scheme based on a compressed hot-cold clustering called CHC-Tree. CHC-Tree-based index management improves index operation performance by dividing index nodes into hot or cold segments and compressing pointers and keys in the index nodes and clustering the hot or cold segments. The offset compression techniques using unused free area in cold index node lead to reduce the number of slow erase operations in index node insert/delete processes. Simulation results show that our scheme significantly reduces the write and erase operation overheads, improving the index search performance of B-Tree by up to 26 percent, and the index update performance by up to 23 percent.

• Nuclear Engineering and Technology
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• v.46 no.2
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• pp.169-182
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• 2014

High-performance research reactors require fuel that operates at high specific power to high fission density, but at relatively low temperatures. Research reactor fuels are designed for efficient heat rejection, and are composed of assemblies of thin-plates clad in aluminum alloy. The development of low-enriched fuels to replace high-enriched fuels for these reactors requires a substantially increased uranium density in the fuel to offset the decrease in enrichment. Very few fuel phases have been identified that have the required combination of very-high uranium density and stable fuel behavior at high burnup. U-Mo alloys represent the best known tradeoff in these properties. Testing of aluminum matrix U-Mo aluminum matrix dispersion fuel revealed a pattern of breakaway swelling behavior at intermediate burnup, related to the formation of a molybdenum stabilized high aluminum intermetallic phase that forms during irradiation. In the case of monolithic fuel, this issue was addressed by eliminating, as much as possible, the interfacial area between U-Mo and aluminum. Based on scoping irradiation test data, a fuel plate system composed of solid U-10Mo fuel meat, a zirconium diffusion barrier, and Al6061 cladding was selected for development. Developmental testing of this fuel system indicates that it meets core criteria for fuel qualification, including stable and predictable swelling behavior, mechanical integrity to high burnup, and geometric stability. In addition, the fuel exhibits robust behavior during power-cooling mismatch events under irradiation at high power.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.4
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• pp.18-26
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• 2001

In this paper, we propose an ATC(Automatic Transfer mode Controller) algorithm and an average-mode-change method for use in Gear shift PLL which can automatically change loop gain. The proposed ATC algorithm accurately detects proper timing or the mode change and has a very simpler structure - than the conventional lock detector algorithm often used in QPSK. And the proposed average mode change method can obtain low errors of estimated frequency offset by averaging the loop filter output of frequency component in shift register. These algorithms are also useful in designing ASIC, since these algorithms occupy small circuit area and are adaptable for high speed digital processing. We also present phase tracking performance of proposed Gear-shift PLL, which is composed of polarity decision PD, ATC and average mode change circuit, and analyze the results by examining constellation at each mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3A
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• pp.282-290
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• 2006

In this paper, we propose an enhanced Timing Estimator algorithm for 2.45GHz LR-WPAN receiver. Because an expensive and highly efficient oscillator can't be used for low-cost implementation, a Timing Estimator algorithm having stable operation in the channel environment with center frequency tolerance of 80 ppm is required. To enhance the robustness to frequency offset and the stability of receiver performance, multiple delay differential filter is adopted. By utilizing the characteristic that the correlation result between the output signal of Multiple delay differential filter and reference signal is restricted on the In-phase part of the correlator output, a coherent detection scheme instead of the typical noncoherent one is adopted for Timing Estimator. The application of the coherent detection scheme is suitable for LR-WPAN receiver aimed at low-cost, low-power, and low-complexity, since it can remove performance degradation due to squaring loss of I/Q squaring operation and decrease implementation complexity. Computer simulation results show that the proposed algorithm achieved performance improvement compared with the differential detection-based noncoherent scheme by 2dB in average.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.8
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• pp.1741-1748
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• 2005

In this paper, we describe VLSI design and performance evaluation of OCB-AES crytographic algorithm that simulataneously provides privacy and authenticity. The OCB-AES crytographic algorithm sovles the problems such as long operation time and large hardware of conventional crytographic system, because the conventional system must implement the privancy and authenticity sequentially with seqarated algorithms and hardware. The OCB-AES processor with area-efficient modular offset generator and tag generator is designed using IDEC Samsung 0.35um standard cell library and consists of about 55,700 gates. Its cipher rate is about 930Mbps and the number of clock cycles needed to generate the 128-bit tags for authenticity and integrity is (m+2)${\times}$(Nr+1), where m and Nr represent the number of block for message and number of rounds for AES encryption, respectively. The OCB-AES processor can be applicable to soft cryptographic IP of IEEE 802.11i wireless LAN and Mobile SoC.

• Journal of the Korea Furniture Society
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• v.20 no.5
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• pp.467-479
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• 2009

The high-tech computer technology developments have greatly affected the area of design education. Starting from the mid 80s, innovations in visual presentation methods have heightened with 2D computer graphic programs, CAD & 3D modeling, and Rapid Prototype that allows dimensional generation. The specialty and quality in design studio education have advanced due to the development in presentation methods such as Power Point and Keynote. But there are many problems with the current method of presenting the visual outcome in a data format using beam projectors, which is a vertical presenting method compared to the old studio study method of conducting discussions and reviews based on the substantial outcome. The essence of studio study that allows for comparisons and analysis by horizontally opening up the various work outcomes is being offset. Also the requirement for manual idea sketching work that plays an important role in the initial design phase continuing to decrease due to the digital working process dependence and cumbersome procedures in the presentation. In order to resolve this problem, the CALM system (Class Applied LCD Modular System) has been developed that replaces the method of attaching the sketches or renderings on the wall with a digital multi-display system. In a nutshell, individuals will upload the outcomes online and display them on the CALM system studio that is composed of 32 LCD (Columns: 4 $\times$ Rows: 8) monitors that are 19 inches in size so that various personnel can openly study the design outcomes. Also the central 42 inch PDP monitor that offers touch pad capability allows each design outcome to be described and examined by expanding. The concept phase of this development process has elevated to the production of an operating prototype that is being reviewed of its practicality. It is considered that the development of this system will decrease the extreme tendency of depending on digital operation but achieve revitalization of a more realistic and opened studio study environment compared to the individual consulting method of the old study approach.

• The Journal of the Convergence on Culture Technology
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• v.9 no.2
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• pp.301-306
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• 2023

Convergeance in the military operations can be attained by simultaneously integrating effects based on sensor, C2, shooter asset in multi-domain and there is no exception to special operations. However, because of challenges from enemy, terrain, geopraphy, and weather, it's not easy to intertwine effects created from ground, sea, air, cyber and electromagnetic spectrum, and space in special operations conducted in deep area. This study presented how to intertwine high-tech such as long-rane reconnaissance·strike drone, cutting-edge sensor, jamming pod, and modular repeater in order to offset aforementioned challenges. Several new high-tech are able to strengthen convergeance of special operations in accordance with the development of the 4th industrial revolution. Therefore, follow-up studies need to be continued making an efforts to search for them.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.