• Title/Summary/Keyword: OCXO

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A study on the change of characteristics and frequency correction method of OCXO by temperature sensor position (온도 센서 위치에 의한 OCXO의 특성 변화와 주파수 보정 방법 연구)

  • Cho, Gyu-Pil;Lee, Young-Soon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.20 no.6
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    • pp.129-135
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    • 2020
  • This study relates to a characteristic change and frequency correction method according to the temperature sensor position of an oven-controlled crystal oscillator (OCXO) using a 10 MHz SC-CUT crystal. Although there are several methods of manufacturing the previous high-precision 10MHz OCXO, the present study shows that the frequency stability characteristics against external temperature changes can be improved simply by adjusting the position of the temperature sensor. Factors that affect the frequency characteristics of the OCXO include the temperature transmitted to the crystal, the voltage applied to the crystal, and the capacitance constituting the oscillation circuit. The amount of change in frequency due to these factors was measured, and the change in the correction value of the OCXO output frequency was investigated by measuring the temperature inflection point and changing the capacitor value.

A Frequency Model of OCXO for Holdover Mode of DP-PLL (DP-PLL의 Holdover 모드에 대한 OCXO의 주파수 모델)

  • Han, Wook;Hwang, Jin-Kwon;Kim, Yung-Kwon
    • Journal of IKEEE
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    • v.4 no.2 s.7
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    • pp.266-273
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    • 2000
  • A frequency model of an OCXO (Oven Controlled X-tal Oscillator) is suggested to implement a holdover algorithm in a DP-PLL (Digital Processing-Phase Locked Loop) system. This model is presented simply with second order polynomials with respect to temperature and aging of the OCXO. The model parameters are obtained from experimental data by applying the LSM (Least Squared Method). A holdover algorithm is also suggest using the frequency model. The obtained model is verified to simulate the holdover algorithm with experimental phase data due to variation of temperature.

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A Design of LORAN Disciplined Oscillator

  • Hwang, Sang-Wook;Choi, Yun Sub;Yeo, Sang-Rae;Park, Chansik;Yang, Sung-Hoon;Lee, Sang Jeong
    • Journal of Positioning, Navigation, and Timing
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    • v.2 no.1
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    • pp.75-80
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    • 2013
  • This article presents the design of long range navigation (LORAN)-disciplined oscillator (LDO), employing the timing information of the LORAN system, which was developed as a backup system that corrects the vulnerability of the global positioning system (GPS)-based timing information utilization. The LDO designed on the basis of hardware generates a timing source synchronized with reference to the timing information of the LORAN-C receiver. As for the LDO-based timing information measurement, the Kalman filter was applied to estimate the measurement of which variance was minimized so that the stability performance could be improved. The oven-controlled crystal oscillator (OCXO) was employed as the local oscillator of the LDO. The controller was operated by digital proportional-integral-derivative (PID) controlling method. The LDO performance evaluation environment that takes into account the additional secondary factor (ASF) of the LORAN signals allows for the relative ASF observation and data collection using the coordinated universal time (UTC). The collected observation data are used to analyze the effect of ASF on propagation delay. The LDO stability performance was presented by the results of the LDO frequency measurements from which the ASF was excluded.

A Clock Generation Scheme for TDM-CDM Converter in Gap Filler for the Satellite DMB Systems (위성 DMB용 중계기(Gap Filler)의 TDM-CDM변환부 클럭 생성 방안 연구)

  • Kim, Chong-Hoon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.1
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    • pp.93-97
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    • 2007
  • In this paper a new clock generation scheme for TDM-CDM converter in the Gap Filler for satellite DMB systems has been proposed. The scheme uses the frame sync signal from the Ku band TDM receiver to lock the VCXO which provides the system clock for the TDM-CDM converter. The locking algorithm can be easily implemented in the FPGA, so that no separate circuitry is needed as in conventional PLL. With a stable OCXO, The scheme can be used to generate the reference clock to the local oscillator for RF parts.

KOMPSAT-2에 사용되는 GPS Receiver 성능 시험

  • 조승원;권기호;최종연;윤영수
    • Bulletin of the Korean Space Science Society
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    • 2003.10a
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    • pp.107-107
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    • 2003
  • GPS Receiver는 위성에 위치 정보와 시간 정보등을 제공하고 navigation을 관리하며 이에 관련된 signal을 processing하는 역할을 한다. 2005년에 발사 예정인 KOMPSAT-2 위성에는 Alcatel에서 제작된 Topstar 3000이 사용된다. Topstar 3000은 RF 부분과 digital 처리부분으로 구성된 GPS core부분과 MLD-STD_1553, DC-DC converter, 그리고 Ovened-controlled Oscillator(OCXO)부분으로 구성되는 option module 부분으로 구성되어 있다. 본 논문에서는 GPS Signal Simulator로 KOMPSAT-2의 실제 궤도를 구현해서 Sun-Point Mode와 Earth-Point Mode 등 여러가지 Mode 에서 GPS Receiver의 시간, 위치, 속도 정보의 정확성에 대한 성능이 분석된다.

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Design of Local Oscillator with Low Phase Noise for Ka-band Satellite Transponder (Ka-band 위성 중계기용 저위상잡음 국부발진기의 설계 및 제작)

  • 류근관;이문규;염인복;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.6
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    • pp.552-559
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    • 2002
  • The EM(Engineering Model) LO(Local Oscillator) is designed for Ka-band satellite transponder. The VCO(Voltage Controlled Oscillator) is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. The phase of VCO is locked to that of a stable OCXO(Oven Controlled Crystal Oscillator) by using a SPD(Sampling Phase detector) to improve phase noise performance in the loop bandwidth. This LO exhibits the harmonic rejection characteristics above 43.83 dBc and requires 15 V and 160 mA. The phase noise characteristics are performed as -102.5 dBc/Hz at 10 KHz offset frequency and -104.0 dBc/Hz at 100 KHz offset frequency, respectively, with the output power of 13.50 dBm$\pm$0.33 dB over the temperature range of -20~+7$0^{\circ}C$.

TDoA-Based Practical Localization Using Precision Time-Synchronization (정밀 시각동기를 이용한 TDoA 기반의 위치 탐지)

  • Kim, Jae-Wan;Eom, Doo-Seop
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.2
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    • pp.141-154
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    • 2013
  • The technology of precise time-synchronization between signal receive devices for separation distance operation can be a key point for the technology with TDoA-based system. We propose a new method for the higher accuracy of system's time-synchronization in this paper, which uses OCXO and DPLL with high accuracy to achieve phase synchronization at 1 pps (pulse per second) of signal. And the method receive time value from a GPS satellite. Essentially, the performance of GPS with high accuracy refers to long-term frequency stability for its reliability. As per the characteristic, as the GPS timing signals are synchronized continuously, the accuracy of time-synchronization gets improved proportionally. Therefore, if the time synchronization is accomplished, the accuracy of the synchronization can be up to 0.001 ppb (part per billion). Through the improved accuracy of the time-synchronization, the measurement error of TDOA-based location detection technology is evaluated. Consequently, we verify that TDoA-based location measurement error can be greatly improved via using the improved method for time-synchronization error.

Phase Noise Analysis of 2.4 GHz PLL using SPD (SPD를 이용한 2.4 GHz PLL의 위상잡음 분석)

  • Chae, Myeoung-ho;Kim, Jee-heung;Park, Beom-jun;Lee, Kyu-song
    • Journal of the Korea Institute of Military Science and Technology
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    • v.19 no.3
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    • pp.379-386
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    • 2016
  • In this paper, phase noise analysis result for 2.4 GHz PLL(phase locked loop) using SPD(sample phase detector) is proposed. It can be used for high performance frequency synthesizer's LO(local oscillator) to extend output frequency range or for LO of offset PLL to reduce a division rate or for clock signal of DDS(direct digital synthesizer). Before manufacturing, theoretical estimation of PLL's phase noise performance should be performed. In order to calculate phase noise of PLL using SPD, Leeson model is used for modeling phase noise of VCO(voltage controlled oscillator) and OCXO(ovened crystal oscillator). After theoretically analyzing phase noise of PLL, optimized loop filter bandwidth was determined. And then, phase noise of designed loop filter was calculated to find suitable OP-Amp. Also, the calculated result of phase noise was compared with the measured one. The measured phase noise of PLL was -130 dBc/Hz @ 10 kHz.

Evaluation of Synchronization Performance with PTP (정밀 시각 프로토콜 동기 성능 평가)

  • Lee, Young-Kyu;Yang, Sung-Hoon;Lee, Chang-Bok;Lee, Jong-Goo;Park, Young-Mi;Lee, Moon-Seok
    • Journal of Institute of Control, Robotics and Systems
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    • v.20 no.6
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    • pp.669-675
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    • 2014
  • In this paper, we described the investigated theoretical time synchronization performances and experiment results obtained by commercially provided PTP (Precise Time Protocol) modules when the time of a slave clock is synchronized to the master clock. In the case of the theoretical performance analysis, we investigated 3 types of clock levels such as Crystal Oscillator (XO), TCXO (Temperature Compensated XO) and OCXO (Oven Controlled XO). From the analysis, it was observed that the synchronization performance is greatly influenced by the synchronization period and the required performance under 1 us can be achieved by using XO level clocks when the synchronization period is less than 2 seconds and the uncertainty of the propagation delay is under 100 ns. For the experiments using commercial PTP modules, the synchronization performance was investigated for direct, through 1 hub and through 2 hubs connections between the master clock and the slave clock. From the experiment results, we observed that time synchronization under 90 ns with 1,000 seconds observation interval can be achieved in the case of direct connection.

Design and Fabrication of 26.4 GHz Local Oscillator for Satellite Payload (위성 탑재체용 26.4 GHz 국부발진기의 설계 및 제작)

  • Shin Dong-Hwan;Ryu Keun-Kwan;Chang Dong-Pil;Lee Moon-Que;Yom In-Bok;Oh Seung-Hyeub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.2A
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    • pp.194-200
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    • 2006
  • A 26.4 GHz phase locked oscillator(PLO) for communication satellite transponder is developed. The PLO consists of fundamental frequency generation module(FFGM) and frequency multiplication part(FMP). The signal of 26.4 GHz is generated through frequency tripling process of 8.8 GHz fundamental frequency. Phase locking technique using sampling phase detector(SPD) is adopted to design the FFGM. The MMIC tripler and amplifier are also designed for the reduction of the size and mass of FMP. The phase noise characteristics are exhibited as -96 dBc/Hz at 10 tHz offset frequency and -105 dBc/Hz at 100 kHz offset frequency, respectively, with the output power over 11 dBm. All performance parameters are complied with the design requirements.