• Title/Summary/Keyword: Ni/Au barrier

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Analysis for Buffer Leakage Current of High-Voltage GaN Schottky Barrier Diode (고전압 GaN 쇼트키 장벽 다이오드의 완충층 누설전류 분석)

  • Hwang, Dae-Won;Ha, Min-Woo;Roh, Cheong-Hyun;Park, Jung-Ho;Hahn, Cheol-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.14-19
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    • 2011
  • We have fabricated GaN Schottky barrier diode (SBD) for high-voltage applications on Si substrate. The leakage current and the electrical characteristics of GaN SBD are investigated by annealing metal-semiconductor junctions. Ohmic junctions of Ti/Al/Mo/Au and Schottky junctions of Ni/Au are used in the fabrication. A test structure is proposed to measured buffer leakage current through a mesa structure. When annealing temperature is increased from $700^{\circ}C$ to $800^{\circ}C$, measured buffer leakage current is also increased from 87 nA to 780 nA at the width of 100 ${\mu}m$. The diffusion of Au, Ti, Mo, O into GaN buffer layer increases the leakage current and that is verified by Auger electron spectroscopy. Experimental results show that the low leakage current and the high breakdown voltage of GaN SBD are achieved by annealing metal-semiconductor junctions.

Intermetallic Formation between Sn-Ag based Solder Bump and Ni Pad in BGA Package (BGA 패키지에서 Sn-Ag계 솔더범프와 Ni pad 사이에 형성된 금속간화합물의 분석)

  • Yang, Seung-Taek;Chung, Yoon;Kim, Young-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.9 no.2
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    • pp.1-9
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    • 2002
  • The intermetallic formation between Sn-Ag-(Cu) solders and metal pads in a real BGA package was characterized using SEM, EDS, and XRD. The intermetallic phase formed in the interface between Sn-Ag-Cu and Au/Ni/Cu pad is likely to be ternary compound of $(Cu,Ni)_6Sn_5$ from EDS analysis High concentration of Cu was observed in the solder/Ni interface. XRD analysis confirmed that $\eta -Cu_6 Sn_5$ type was intermetallic phase formed in the interface between Cu containing solders and Ni substrates and $Ni_3$Sn_4$ intermetallic was formed in the Sn-Ag solder/Ni interface. The thickness of intermetallic phase increased with the reflow times and Cu concentration in solder.

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Radiation Damage of SiC Detector Irradiated by High Dose Gamma Rays

  • Kim, Yong-Kyun;Kang, Sang-Mook;Park, Se-Hwan;Ha, Jang-Ho;Hwang, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.12a
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    • pp.87-90
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    • 2006
  • Two SiC radiation detector samples were irradiated by Co-60 gamma rays. The irradiation was performed with dose rates of 5 kGy/hour and 15 kGy/hour for 8 hours, respectively. Metal/semiconductor contacts on the surface were fabricated by using a thermal evaporator in a high vacuum condition. The SiC detectors have metal contacts of Au(2000 ${\AA}$)/Ni(300 ${\AA}$) at Si-face and of Au(2000 ${\AA}$)/Ti(300 ${\AA}$) at C-face. I-V characteristics of the SiC semiconductor were measured by using the Keithley 4200-SCS parameter analyzer with voltage sources included. From the I-V curve, we analyzed the Schottky barrier heights(SBHs) on the basis of the thermionic emission theory. As a result, the 6H-SiC semiconductor showed- similar Schottky barrier heights independent to the dose rates of the irradiation with Co-60 gamma rays.

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Effect of Reflow Variables on the Characteristic of BGA Soldering (리플로 공정변수가 BGA 솔더링 특성에 미치는 영향)

  • 한현주;박재용;정재필;강춘식
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.3
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    • pp.9-18
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    • 1999
  • In this study, Metallugical properties between Sn-3.5Ag, Sn-37Pb eutectic solders and Au/Ni/cu substrate according to time span above the melting point were investigated. A conventional reflow soldering machine wert used for this study and time span above the melting point was determined by changing peak soldering temperature and conveyor speed. As results, scallop type intermetallic compounds of $Ni_3Sn_4$ were formed at joint interface and no Cu-Sn compounds were found at all; Ni layer performed as a barrier for Cu diffusion. As the peak soldering temperature increased, thickness of the intermetallic compound layer increased; maximum thickness of the scallop-layer was 2.2$\mu\textrm{m}$. The shape of scallops were transformed from hemi-sphere type to elliptical shape with smaller size. Micro-hardness of the solder joint decreased as the eutectic structure of Sn-3.5Ag and Sn-37Pb increased.

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Investigation of Pt/Ti, Ni/Ti Diffusion Barrier Characteristics on Copper in DRAM Technology (DRAM 기술에서 구리에 대한 Pt/Ti, Ni/Ti의 확산 방지막 특성에 관한 연구)

  • Noh, Young-Rae;Kim, Youn-Jang;Chang, Sung-Keun
    • Proceedings of the KIEE Conference
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    • 2001.11a
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    • pp.9-11
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    • 2001
  • 차세대 고속 DRAM기술에 사용될 금속인 Cu의 확산 방지막(diffusion harrier) 물질로는 Ta 또는 W 같은 Refractory metal 이 융점(melting point)이 높고 저항값이 낮아 많이 연구 보고되고 있으나, 본 논문에서는 초고주파 소자에서 Au의 확산 방지 막으로 많이 사용되고 있으며. 선택적 증착이 용이한 Pt과 Ni를 MOS 소자의 Cu 확산 방지 막으로 적용하며 어닐링한 후 소자의 게이트 산화막 누설전류($I_{leak}$), 그리고. Si/$SiO_2$ 계면의 trap density 등의 변이를 측정하여 Cu가 소자의 특성 열화에 미치는 영향을 연구하였다. 실험 결과 Pt/Ti($200{\AA}/100{\AA}$)를 적용한 경우 소자 측성 열화가 가장 적었으며. 이는 Copper의 확산 방지막으로 Pt/Ti를 사용하여 전기적 특성 및 계면 특성을 개선시킬 수 있음을 보여 주었다. 이는 SIMS Profile을 통해서도 확인하였다.

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A Study on the Ohmic Contacts and Etching Processes for the Fabrication of GaSb-based p-channel HEMT on Si Substrate (Si 기판 GaSb 기반 p-채널 HEMT 제작을 위한 오믹 접촉 및 식각 공정에 관한 연구)

  • Yoon, Dae-Keun;Yun, Jong-Won;Ko, Kwang-Man;Oh, Jae-Eung;Rieh, Jae-Sung
    • Journal of IKEEE
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    • v.13 no.4
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    • pp.23-27
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    • 2009
  • Ohmic contact formation and etching processes for the fabrication of MBE (molecular beam epitaxy) grown GaSb-based p-channel HEMT devices on Si substrate have been studied. Firstly, mesa etching process was established for device isolation, based on both HF-based wet etching and ICP-based dry etching. Ohmic contact process for the source and drain formation was also studied based on Ge/Au/Ni/Au metal stack, which resulted in a contact resistance as low as $0.683\;{\Omega}mm$ with RTA at $320^{\circ}C$ for 60s. Finally, for gate formation of HEMT device, gate recess process was studied based on AZ300 developer and citric acid-based wet etching, in which the latter turned out to have high etching selectivity between GaSb and AlGaSb layers that were used as the cap and the barrier of the device, respectively.

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A Study on Electroless Palladium Layer Characteristics and Its Diffusion in the Electroless Palladium Immersion Gold (EPIG) Surface Treatment for Fine Pitch Flip Chip Package (미세피치 플립칩 패키지 구현을 위한 EPIG 표면처리에서의 무전해 팔라듐 피막특성 및 확산에 관한 연구)

  • Hur, Jin-Young;Lee, Chang-Myeon;Koo, Seok-Bon;Jeon, Jun-Mi;Lee, Hong-Kee
    • Journal of the Korean institute of surface engineering
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    • v.50 no.3
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    • pp.170-176
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    • 2017
  • EPIG (Electroless Pd/immersion Au) process was studied to replace ENIG (electroless Ni/immersion Au) and ENEPIG (electroless Ni/electroless Pd/immersion Au) processes for bump surface treatment used in high reliable flip chip packages. The palladium and gold layers formed by EPIG process were uniform with thickness of 125 nm and 34.5 nm, respectively. EPAG (Electroless Pd/autocatalytic Au) also produced even layers of palladium and gold with the thickness of 115 nm and 100 nm. TEM results exhibited that the gold layer in EPIG surface had crystalline structure while the palladium layer was amorphous one. After annealing at 250 nm, XPS analysis indicated that the palladium layer with thickness more than 22~33 nm could act as a diffusion barrier of copper interconnects. As a result of comparing the chip shear strength obtained from ENIG and EPIG surfaces, it was confirmed that the bonding strength was similar each other as 12.337 kg and 12.330 kg, respectively.

Fabrications and Analysis of Schottky Diode of Silicon Carbide Substrate with novel Junction Electric Field Limited Ring (새로운 전계 제한테 구조를 갖는 탄화규소 기판의 쇼트키 다이오드의 제작과 특성 분석)

  • Cheong Hui-Jong;Han Dae-Hyun;Lee Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.7
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    • pp.1281-1286
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    • 2006
  • We have used the silicon-carbide(4H-SiC) instead of conventional silicon materials to develope of the planar junction barrier schottky rectifier for ultra high breakdown voltage(1,200 V grade). The substrate size is 2 inch wafer, Its concentration is $3*10^{18}/cm^{3}$ of $n^{+}-$type, thickness of epitaxial layer $12{\mu}m$ conentration is $5*10^{15}cm^{-3}$ of n-type. The fabticated devices are junction barrier schottky rectifier, The guard ring for improvement of breakdown voltage is designed by the box-like impurity of boron, the width and space of guard ring was designed by variation. The contact metals to rectify were used by the $Ni(3,000\:{\AA})/Au(2,000\:{\AA})$. As a results, the on-state voltage is 1.26 V, on-state resistance is $45m{\Omega}/cm^{3}$, maximum value of improved reverse breakdown voltage is 1180V, reverse leakage current density is $2.26*10^{-5}A/CM^{3}$. We had improved the measureme nt results of the electrical parameters.

The surface propery change of multi-layer thin film on ceramic substrate by ion beam sputtering (이온빔 스퍼터링법에 의한 다층막의 표면특성변화)

  • Lee, Chan-Young;Lee, Jae-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.259-259
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    • 2008
  • The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

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Characteristics of InGaAs/GaAs/AlGaAs Double Barrier Quantum Well Infrared Photodetectors

  • Park, Min-Su;Kim, Ho-Seong;Yang, Hyeon-Deok;Song, Jin-Dong;Kim, Sang-Hyeok;Yun, Ye-Seul;Choe, Won-Jun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.324-325
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    • 2014
  • Quantum wells infrared photodetectors (QWIPs) have been used to detect infrared radiations through the principle based on the localized stated in quantum wells (QWs) [1]. The mature III-V compound semiconductor technology used to fabricate these devices results in much lower costs, larger array sizes, higher pixel operability, and better uniformity than those achievable with competing technologies such as HgCdTe. Especially, GaAs/AlGaAs QWIPs have been extensively used for large focal plane arrays (FPAs) of infrared imaging system. However, the research efforts for increasing sensitivity and operating temperature of the QWIPs still have pursued. The modification of heterostructures [2] and the various fabrications for preventing polarization selection rule [3] were suggested. In order to enhance optical performances of the QWIPs, double barrier quantum well (DBQW) structures will be introduced as the absorption layers for the suggested QWIPs. The DBWQ structure is an adequate solution for photodetectors working in the mid-wavelength infrared (MWIR) region and broadens the responsivity spectrum [4]. In this study, InGaAs/GaAs/AlGaAs double barrier quantum well infrared photodetectors (DB-QWIPs) are successfully fabricated and characterized. The heterostructures of the InGaAs/GaAs/AlGaAs DB-QWIPs are grown by molecular beam epitaxy (MBE) system. Photoluminescence (PL) spectroscopy is used to examine the heterostructures of the InGaAs/GaAs/AlGaAs DB-QWIP. The mesa-type DB-QWIPs (Area : $2mm{\times}2mm$) are fabricated by conventional optical lithography and wet etching process and Ni/Ge/Au ohmic contacts were evaporated onto the top and bottom layers. The dark current are measured at different temperatures and the temperature and applied bias dependence of the intersubband photocurrents are studied by using Fourier transform infrared spectrometer (FTIR) system equipped with cryostat. The photovoltaic behavior of the DB-QWIPs can be observed up to 120 K due to the generated built-in electric field caused from the asymmetric heterostructures of the DB-QWIPs. The fabricated DB-QWIPs exhibit spectral photoresponses at wavelengths range from 3 to $7{\mu}m$. Grating structure formed on the window surface of the DB-QWIP will induce the enhancement of optical responses.

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