• Title/Summary/Keyword: New correction factor

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A Characteristic Study on the Power Factor Correction Application for Induction Motor (유도전동기에 대한 역률 보상설비의 특성 해석)

  • Kim, Jong-Gyeum;Park, Young-Jeen
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.9
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    • pp.25-31
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    • 2008
  • The field of induction motor is magnetized and demagnetized for each reversal of the current. This field component of the motor accounts for most of the reactive component of inductive load. Reactive power needs to sustain the electromagnetic field required for the induction motor to operate. Power factor of induction motor is usually low and power factor correction needs. Power factor becomes low by the effect of the reduction operation of load capacity. In most cases, Capacitor capacity for the power factor correction should be complied with the recommendation by the motor capacity. But Capacitor value for power factor correction can't change during the normal operation. In this paper, we analyzed characteristics of power and power factor changing by load fluctuation of low-voltage small size induction motor and show that lower power factor correction's parameter of existing recommendation should be revised by new value.

NEW GROUP OF ZVS PWM CONVERTERS OPERABLE ON CONSTANT FREQUENCY AND ITS APPLICATION TO POWER FACTOR CORRECTION CIRCUIT (일정 주파수로 동작이 가능한 ZVS PWM 컨버터와 역률개선 회로에의 응용)

  • Huh, Dong-Y.;Kim, Hack-S.;Cho, Gyu-H.
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.988-991
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    • 1992
  • A new zero voltage switching PWN converter family is presented by using a new ZVS PWN module (ZPM) with a saturable inductor which prevents diode junction capacitors and a commutation inductor from resonating. The new converters show almost all characteristics of the conventional PWN converters. A boost ZVS PWN converter is applied to a power factor correction circuit. It operates on an continuous conduction mode. Experimental results for output power of 1kW are presented.

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Averaged Model for Controlled On-Time Boost Power Factor Correction Circuit (연속-불연속 경계 모드에서 동작하는 승압형 역률보상회로의 평균화 모델)

  • 박효길;최병조;백영식
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.126-129
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    • 1999
  • This paper presents a new averaged model for controlled on time boost power factor correction (PFC) circuit. The proposed model accurately predicts the average behavior of the PFC circuit, and offers a good alternative in studying the large signal dynamics of the circuit. The accuracy of the model is verified through both computer simulation and experiments.

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SMALL-SIGNAL MODEL FOR A CONTROLLED ON-TIME BOOST POWER FACTOR CORRECTION CIRCUIT

  • Kang, Yonghan;Choi, Byungcho
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.642-647
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    • 1998
  • A new small-signal model for the controlled on-time boost power factor correction (PFC) circuit is presented. The proposed small-signal model is valid up to high frequencies over lKHz. The model can be used in designing the voltage feedback compensation of PFC circuits, the control bandwidth of which is maximized with auxiliary means of removing the low-frequency ripple from the output. The accuracy of the model is confirmed by a 200W experimental hardware

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Active Power Factor Correction Technology of Electronic Ballast (안정기용 능동역율 제어기술)

  • Han, Soo-Bin;Park, Suck-In;Jeoung, Hak-Guen;Jung, Bong-Man;You, Seong-Won
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2006.05a
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    • pp.225-227
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    • 2006
  • Active power factor correction methods for electronic ballast are reviewed in this paper. PFC technology becomes more important due to various wattage ratings of new light sources. Expecially, most popular two method critical conduction mode and average mode, are described. Each characteristics are compared in relation to application target and power rating.

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Novel Control Range Compensation Method in Power Factor Correction Circuit

  • Park, Youngbae;Cho, Donghye
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.224-225
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    • 2012
  • When Power Factor Correction(PFC) boost converter is designed for the universal input range, unwanted burst operation can be found at high line and light load. This operation may cause an audible noise from the boost inductor or sensitive flicker for human eye can be found in case of the display application. In order to solve this difficulty, this paper proposes the new control range compensation method and shows the effectiveness than the conventional method thru the experimental result.

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Implementation and Performance Evaluation of Digital Flickermeter Algorithm According to IEC61000-4-15 Edition 2 for Korean Distribution Power System (국내 계통 특성을 고려한 IEC61000-4-15 Edition 2 기반의 디지털 플리커 미터 알고리즘 구현 및 평가)

  • Shin, Hoon-Chul;Han, Su-Kyoung;Park, Sang-Ho;Kim, Kern-Joong;Cho, Soo-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.7
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    • pp.1017-1024
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    • 2017
  • The International Electrotechnical Commission(IEC) 61000-4-15 is a standard proposing techniques for a flicker meter test and measurement method. The IEC61000-4-15 ed1 announced in 1997 was not include tests for accurate verification. Also it was not explained flicker meter algorithm that can be directly applied to the other power systems. But the new edition of IEC61000-4-15 ed2 prescribes a variety of tests for verify flicker meter algorithm and it explains 'correction factor' used for measuring flicker in other power systems. It can measure flicker severity in 220V system by multiplying correction factor to the measured values with the 230V algorithm. This paper compared the method of measuring flicker severity in korea power system using the correction factor and the modified weighting filter, after verifying of digital flicker meter algorithm created by using matlab based on IEC61000-4-15 ed2.

Power Factor Correction Circuit with a Soft-switched Boost Scheme (스위칭 손실을 최소화한 부스트 방식의 역률 개선 회로)

  • Lee, Hyo-Jae;Choi, Hyun-Chil
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.2
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    • pp.122-129
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    • 2011
  • In this paper, a new power factor correction circuit(PFC) based on a soft-switched boost scheme is proposed. Except for some soft-switching transition intervals, it operates exactly like the conventional boost scheme. Thus the desirable features of both high efficiency and easy control can be obtained. The design guidelines are suggested to achieve high efficiency. To verify the superior performance of the proposed circuit, experiment and simulation is carried out.

A study on the characteristics of power factor correction circuits with input active boost converter (입력 능동 부스트 컨버터를 고려한 역률개선회로의 특성분석)

  • Jang, Jun-Young;Lee, Kwan-Yong;Kim, Cherl-Jin
    • Proceedings of the KIEE Conference
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    • 2003.04a
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    • pp.270-272
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    • 2003
  • Switching power supplies are widely used in many industrial fields. Power factor correction(PFC) circuits have tendency to be applied in new power supply designs. The input active power factor correction(APFC) circuits can be implemented using either the two-stage approach or the single-stage approach. The single-stage PFC circuit has advantage to reduce the number of components by eliminating a need for the PFC switch and control circuit. However, unlike in the two-stage approach, the do voltage on the energy storage capacitor in a single-stage PFC circuit is not well regulated. As a result. in universal line application($90{\sim}265Vac$), the storage capacitor voltage varies with the load and line variation. In this paper, the performance of output voltage regulation and transient response are clarified here. The validity of designed boost PFC circuit is confirmed by MATLAB simulation and experimental results of 2 [kW] prototype converter.

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Interleaved Boost-Flyback Converter with Boundary Conduction Mode for Power Factor Correction

  • Lin, Bor-Ren;Chien, Chih-Cheng
    • Journal of Power Electronics
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    • v.12 no.5
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    • pp.708-714
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    • 2012
  • This paper presents a new interleaved pulse-width modulation (PWM) boost-flyback converter to achieve power factor correction (PFC) and regulate DC bus voltage. The adopted boost-flyback converter has a high voltage conversion ratio to overcome the limit of conventional boost or buck-boost converter with narrow turn-off period. The proposed converter has wide turn-off period compared with a conventional boost converter. Thus, the higher output voltage can be achieved in the proposed converter. The interleaved PWM can further reduce the input and output ripple currents such that the sizes of inductor and capacitor are reduced. Since boundary conduction mode (BCM) is adopted to achieve power factor correction, power switches are turned on at zero current switching (ZCS) and switching losses are reduced. The circuit configuration, principle operation, system analysis, and design consideration of the proposed converter are presented in detail. Finally, experiments conducted on a laboratory prototype rated at 500W were presented to verify the effectiveness of the converter.