• Title/Summary/Keyword: Multi-Time Programmable

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Advanced Optimization of Reliability Based on Cost Factor and Deploying On-Line Safety Instrumented System Supporting Tool (비용 요소에 근거한 신뢰도 최적화 및 On-Line SIS 지원 도구 연구)

  • Lulu, Addis;Park, Myeongnam;Kim, Hyunseung;Shin, Dongil
    • Journal of the Korean Institute of Gas
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    • v.21 no.2
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    • pp.32-40
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    • 2017
  • Safety Instrumented Systems (SIS) have wide application area. They are of vital importance at process plants to detect the onset of hazardous events, for instance, a release of some hazardous material, and for mitigating their consequences to humans, material assets, and the environment. The integrated safety systems, where electrical, electronic, and/or programmable electronic (E/E/PE) devices interact with mechanical, pneumatic, and hydraulic systems are governed by international safety standards like IEC 61508. IEC 61508 organises its requirements according to a Safety Life Cycle (SLC). Fulfilling these requirements following the SLC can be complex without the aid of SIS supporting tools. This paper presents simple SIS support tool which can greatly help the user to implement the design phase of the safety lifecycle. This tool is modelled in the form of Android application which can be integrated with a Web-based data reading and modifying system. This tool can reduce the computation time spent on the design phase of the SLC and reduce the possible errors which can arise in the process. In addition, this paper presents an optimization approach to SISs based on cost measures. The multi-objective genetic algorithm has been used for the optimization to search for the best combinations of solutions without enumeration of all the solution space.

A High PErformance Lookup Controller for ATM based IP Packet Forwarding Engine (ATM 기반 IP 패킷 포워딩 엔진을 위한 고성능 룩업 제어기)

  • Choi, Byeong-Cheol;Kwak, Dong-Yong;Lee, Jeong-Tae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.4B
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    • pp.298-305
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    • 2003
  • In this paper, we proposed a high performance lookup controller for IP packet forwarding engine of ATM based label edge routers. The lookup controller is designed to provide services such as MPLS, VPN, ELL, and RT services as well as the best effort. For high speed searching for IP addresses, we employed a TCAM based hardware search device not using traditional algorithmic approaches. We also implement lookup control functions into FPGA for fast processing of packet header and lookup control. The proposed lookup controller is designed to support differenciated services for users and to process in pipelined mechanism for performance improvement. A two-step search scheme is also applied to perform lookup for the key combined with multi-field of packet header. We found that the proposed lookup controller provides the performance of about 16M packets per second through simulations.

Design of Multimode Block Cryptosystem for Network Security (네트워크 보안을 위한 다중모드 블록암호시스템의 설계)

  • 서영호;박성호;최성수;정용진;김동욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1077-1087
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    • 2003
  • In this paper, we proposed an architecture of a cryptosystem with various operating modes for the network security and implemented in hardware using the ASIC library. For configuring a cryptosystem, the standard block ciphers such as AES, SEED and 3DES were included. And the implemented cryptosystem can encrypt and decrypt the data in real time through the wired/wireless network with the minimum latency time (minimum 64 clocks, maximum 256 clocks). It can support CTR mode which is widely used recently as well as the conventional block cipher modes such as ECB, CBC and OFB, and operates in the multi-bit mode (64, 128, 192, and 256 bits). The implemented hardware has the expansion possibility for the other algorithms according to the network security protocol such as IPsec and the included ciphering blocks can be operated simultaneously. The self-ciphering mode and various ciphering mode can be supported by the hardware sharing and the programmable data-path. The global operation is programmed by the serial communication port and the operation is decided by the control signals decoded from the instruction by the host. The designed hardware using VHDL was synthesized with Hynix 0.25$\mu\textrm{m}$ CMOS technology and it used the about 100,000 gates. Also we could assure the stable operation in the timing simulation over 100㎒ using NC-verilog.

Implementation of the AMBA AXI4 Bus interface for effective data transaction and optimized hardware design (효율적인 데이터 전송과 하드웨어 최적화를 위한 AMBA AXI4 BUS Interface 구현)

  • Kim, Hyeon-Wook;Kim, Geun-Jun;Jo, Gi-Ppeum;Kang, Bong-Soon
    • Journal of the Institute of Convergence Signal Processing
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    • v.15 no.2
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    • pp.70-75
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    • 2014
  • Recently, the demand for high-integrated, low-powered, and high-powered SoC design has been increasing due to the multi-functionality and the miniaturization of digital devices and the high capacity of service informations. With the rapid evolution of the system, the required hardware performances have become diversified, the FPGA system has been increasingly adopted for the rapid verification, and SoC system using the FPGA and the ARM core for control has been growingly chosen. While the AXI bus is used in these kinds of systems in various ways, it is traditionally designed with AXI slave structure. In slave structure, there are problems with the CPU resources because CPU is continually involved in the data transfer and can't be used in other jobs, and with the decreased transmission efficiency because the time not used of AXI bus beomes longer. In this paper, an efficient AXI master interface is proposed to solve this problem. The simulation results show that the proposed system achieves reductions in the consumption clock by an average of 51.99% and in the slice by 31% and that the maximum operating frequency is increased to 107.84MHz by about 140%.

The Continuous Measurement of CO2 Efflux from the Forest Soil Surface by Multi-Channel Automated Chamber Systems (다중채널 자동챔버시스템에 의한 삼림토양의 이산화탄소 유출량의 연속측정)

  • Joo, Seung Jin;Yim, Myeong Hui;Ju, Jae-Won;Won, Ho-yeon;Jin, Seon Deok
    • Ecology and Resilient Infrastructure
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    • v.8 no.1
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    • pp.32-43
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    • 2021
  • Multichannel automated chamber systems (MCACs) were developed for the continuous monitoring of soil CO2 efflux in forest ecosystems. The MCACs mainly consisted of four modules: eight soil chambers with lids that automatically open and close, an infrared CO2 analyzer equipped with eight multichannel gas samplers, an electronic controller with time-relay circuits, and a programmable logic datalogger. To examine the stability and reliability of the developed MCACs in the field during all seasons with a high temporal resolution, as well as the effects of temperature and soil water content on soil CO2 efflux rates, we continuously measured the soil CO2 efflux rates and micrometeorological factors at the Nam-san experimental site in a Quercus mongolica forest floor using the MCACs from January to December 2010. The diurnal and seasonal variations in soil CO2 efflux rates markedly followed the patterns of changes in temperature factors. During the entire experimental period, the soil CO2 efflux rates were strongly correlated with the temperature at a soil depth of 5 cm (r2 = 0.92) but were weakly correlated with the soil water content (r2 = 0.27). The annual sensitivity of soil CO2 efflux to temperature (Q10) in this forest ranged from 2.23 to 3.0, which was in agreement with other studies on temperate deciduous forests. The annual mean soil CO2 efflux measured by the MCACs was approximately 11.1 g CO2 m-2 day-1. These results indicate that the MCACs can be used for the continuous long-term measurements of soil CO2 efflux in the field and for simultaneously determining the impacts of micrometeorological factors.