• Proceedings of the KIEE Conference
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• summer
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• pp.1193-1195
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• 2004

Ozone gas is one of the strongest oxidizing and bleaching agents which leave no residues harmful to the global environment. In recent years, the ozone generator has been widely utilized, However, it has been known that a broader application of ozone is hindered primarily because of its low efficiency of generation. Thus, it is more indispensable to improve actual system efficiency of the silent discharge type ozonizer using high frequency inverter. This paper presents a multi level resonant ozone power regulation by association of high frequency transformers and full bridge invert. And proposed resonant inverter system can generate continuous output voltage. can control linearly quantity of ozone gas. This invert that add PWM forms within square forms of output voltage about one level range. The power regulation characteristics and operating performances of silent discharge (SD)type ozone generating tube load driven by this load proposed inverter using FET modules are illustrated from a practical point of view, which can operate under stable conditions of basic level and PWM hybrid control strategy implemented DSP(2406). The effectoveness of propsed invert type ozonizer is proved by experiment results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2015-2021
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• 2008

Recently, with the growth of photovoltaic system, many researchers and companies have concerned about the multi-level inverter which has an efficiency of boosting voltage. In this paper a novel structure of multi-level converter for reducing ripple of output voltage is proposed. In the proposed converter Buck converters are connected in series to generate the output voltage and the ripple of output voltage can be reduced compared with the exiting Buck converter. Especially when outputting lower output voltage the number of acting switching elements is less and the result of ripple reducing is more obvious. This paper implements a multi-level switching function based on the FPGA.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.514-521
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• 2009

This paper deals with a new overvoltage snubber for a diode-clamped 3-level IGBT inverter. Usually most power converters use snubber circuits to protect the switching devices from voltage spike. However, it is difficult for the diode-clamped multi-level converter to be protected from voltage spike with overvoltage snubber since the series connection of the switching devices. To solve the problem the characteristic of a overvoltage snubber for a DC-DC converter is analyzed, and a new snubber for a diode clamped 3-level inverter is proposed. The performance of the proposed snubber is verified through experiments.

• Journal of Power Electronics
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• v.18 no.1
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• pp.116-128
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• 2018

Conventionally, in order to reduce the ac components of the dc-link capacitors of the two-level Half-Bridge Voltage Source Inverter (HB-VSI), high dc-link capacitances are required. This necessitates the employment of short-lifetime and bulky electrolytic capacitors. In this paper, an analysis for the performance of low dc-link capacitances-based HB-VSI is presented to elucidate its ability to generate an enhanced fundamental output voltage magnitude without increasing the voltage rating of the involved switches. This feature is constrained by the load displacement factor. The introduced enhancement is due to the ac components of the capacitors' voltages. The presented approach can be employed for multi-phase systems through using multi single-phase HB-VSI(s). Mathematical analysis of the proposed approach is presented in this paper. To ensure a successful operation of the proposed approach, a closed loop current controller is examined. An expression for the critical dc-link capacitance, which is the lowest dc-link capacitance that can be employed for unipolar capacitors' voltages, is derived. Finally, simulation and experimental results are presented to validate the proposed claims.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.12
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• pp.136-145
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• 2009

This paper proposes control methods and simulation models of a driving system, which consists of converters and inverters, for high speed trains employing multi-level power converters. The control method of a single phase three-level converter for high-speed trains is designed to use DC values instead of instantaneous current values which are usually used in single-phase application, so that it results in a fast and robust voltage control response. In addition, simulation models of Space Vector Pulse Width Modulation (SVPWM) for single phase three-level converters as well as three level inverters are proposed. Experimental results demonstrate the validity of the simulation model for three-level inverters.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.2
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• pp.135-141
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• 2006

In this paper, LC output filters are designed to reduce output harmonics and harmonic analysis are peformed. Generally, multilevel inverters are used in high power application and operates with low switching frequency, which, in turn, generates large output harmonics. Output filters we used to reduce output harmonics. The design approach to reduce output harmonics of the 31eve1 multilevel inverter is discussed and DSP(TMS320C31) is used for the digital control of the system. The design example is given. The designed system is verified by simulation and experiment.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.12
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• pp.64-70
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• 2008

In case that conventional PRC(Pseudo-Randomized Frequency Carrier) modulation scheme is applied to a three-phase HBML(H-Bridge Multi-Level Inverter), the dominant harmonics spectra appear at twice switching frequency. In this paper, the dominant harmonics spectra spreading effect of the conventional PRC scheme was improved by using three stage MUXs(Multiplexers) and two triangular carriers with fixed frequency which has mutual relation of the twice frequency. To confirm the validity of the improved PRC scheme, the experiment were performed on a 1.5[kw] three-phase HBML based induction motor drives. And, the harmonics spectra of the conventional and improved PRC schemes are compared and discussed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.195-198
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• 2008

Recently, with the growth of photovoltaic system, many researchers and companies have concerned about the multi-level inverter which has an efficiency of boosting voltage. This paper implements a multi-level switching function based on the FPGA. It is efficient to implement the switching function based on the FPGA as a program able logic device. In order to implementation the switching function, this paper synchronized with the microprocessor through the clock and synchronous signal from the microprocessor.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1037-1050
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• 2018

This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1552-1557
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• 2015

The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.